Charge Injection Discharge Circuit for CMOS Sample-and-Hold
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Solution Overview
Problem
Parasitic charge injection onto the output terminal of a hold capacitor in a sample and hold circuit, particularly in CMOS transistors, is problematic as it affects the output and existing compensation techniques either fail to reduce the absolute value of charge injection or incur significant capacitive penalties and die area costs.
Innovation Solution
A charge injection discharge circuit comprising a pulse generating circuit, a main switch, and a secondary switch, where the pulse generating circuit outputs a pulsed signal to actuate the secondary switch during the OFF state of the main switch, allowing for the dissipation of parasitic charge through a voltage dividing circuit, thereby maintaining the output voltage within a specified range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If compensation capacitors are used to offset charge injection, then the charge injection curve is shifted to its minimum at the midpoint, but the absolute value of charge injection at the extremes remains unaffected and capacitance is added which affects bandwidth and impedance
Solution Approach 1:
The patent extracts the parasitic charge from the output terminal by introducing a separate discharge path through the second switch. Instead of using compensation capacitors that add capacitance to the main signal path, the invention removes the harmful charge through a dedicated discharge circuit controlled by the pulsed signal, thereby avoiding the bandwidth and impedance penalties associated with added capacitance.
Solution Approach 2:
The patent introduces a pulsed signal as an intermediary control mechanism that activates the second switch only during the critical discharge phase. This pulsed signal mediates between the main switch operation and the discharge circuit, enabling precise timing of the charge removal without continuously affecting the main signal path or adding capacitance.
2Reliability
If a half switch discharge circuit is used to dissipate parasitic charge, then charge injection is effectively compensated, but die area increases significantly and capacitive penalty is incurred
Solution Approach 1:
The patent employs periodic pulsed action to activate the second switch only during the specific time window when charge discharge is needed. Instead of using a continuously active half switch discharge circuit that occupies significant die area, the invention uses a pulsed signal to periodically enable the discharge path, achieving effective charge compensation with minimal circuit footprint and no continuous capacitive penalty.
3Object-generated harmful factors
If the channel closes instantly when voltage is removed from the gate, then charge injection is eliminated, but the channel cannot close instantly resulting in channel charge flowing to source or drain
Solution Approach 1:
The patent applies preliminary action by activating the discharge circuit (second switch) in advance or simultaneously with the main switch turn-off event. The pulsed signal triggers the discharge path before or during the channel closure process, preparing the charge dissipation mechanism in advance so that when channel charge flows to the output terminal, it is immediately shunted away through the discharge circuit, effectively eliminating the harmful charge injection effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively reduces the parasitic charge at the output terminal, minimizing voltage spikes and maintaining stable input voltage for circuits like analog-to-digital converters, without the capacitive penalties and die area costs associated with existing solutions.
Implementation Method 1
a voltage dividing circuit connected to an output of the secondary switch for reducing the voltage value at the input of the secondary switch to a substantially predetermined value
Data Source
AI summary
A circuit for dissipating injected parasitic charge includes a circuit stage, a pulse generating circuit and a switch. The circuit stage has an input node and an output node that injects a parasitic charge when switched OFF to the output node. The pulse generating circuit can generate a pulsed signal having an input for receiving a control signal. The control signal indicates the circuit stage is switching OFF, and has an output for outputting a pulsed signal in response to the control signal at the input. The pulsed signal can have a predetermined duration. The switch can be configured to be actuated by the pulsed signal output by the pulse generating circuit, and has a terminal connected to the output node of the circuit stage and a terminal connected to circuit to substantially dissipate the injected parasitic charge.