Charge Isolation Region in NAND Strings to Reduce Program Disturb
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Solution Overview
Problem
Program disturb occurs in memory devices due to inadvertent programming of unselected memory cells during the programming of selected cells, caused by high control gate-to-channel voltage and hot carrier injection, leading to changes in threshold voltage and data state shifts.
Innovation Solution
Implementing a charge isolation technique by creating an isolation region in the channel of a NAND string using an isolation word line, which is kept at a low voltage during the application of program voltage to prevent residue electrons from moving and reduce the drain-induced barrier lowering effect, thereby minimizing program disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high control gate voltage is applied during programming to program selected memory cells, then programming efficiency is improved, but program disturb to unselected memory cells increases
Solution Approach 1:
An isolation word line is introduced as an intermediary element between the selected word line and unselected memory cells. This isolation word line acts as a mediator that blocks the harmful electrical field from reaching unselected cells while allowing the programming operation to proceed on selected cells, thus resolving the contradiction between programming efficiency and program disturb.
Solution Approach 2:
The memory array is segmented by introducing isolation word lines that divide the continuous electrical field into isolated regions. This segmentation prevents the high control gate voltage from uniformly affecting all memory cells, instead confining the programming effect to only the selected cells while protecting unselected cells from disturbance.
2Speed
If high control gate voltage is applied to program memory cells, then programming speed is improved, but hot carrier injection into unselected cells increases
Solution Approach 1:
The isolation word line serves as a protective intermediary that prevents hot carriers generated during high-voltage programming from injecting into unselected memory cells. It blocks the path of these harmful carriers while allowing the high-voltage programming operation to proceed at high speed on the selected cells.
Solution Approach 2:
The isolation word line is positioned in advance to preemptively block hot carrier injection paths before the high-voltage programming pulse is applied. This preliminary protective action prevents the harmful effect of hot carrier injection without slowing down the subsequent high-speed programming operation.
3Device complexity
If no isolation structure is used, then device complexity is reduced, but threshold voltage shifts in unselected cells occur
Solution Approach 1:
The isolation word line creates a segmented electrical field structure that isolates the high-voltage programming region from unselected memory cells. This segmentation prevents threshold voltage shifts in unselected cells while adding only a single additional word line to the structure, thus maintaining relatively low device complexity while improving reliability.
4Object-affected harmful factors
If charge isolation is implemented using an isolation word line, then program disturb is reduced, but additional word lines and structure are required
Solution Approach 1:
The isolation word line is designed to serve multiple functions: it acts as a protective barrier against program disturb, provides a reference voltage for the isolation region, and can be integrated into the existing word line decoding structure. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity while achieving effective program disturb reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The charge isolation technique effectively reduces the risk of program disturb by maintaining residue electrons in the channel and smoothing the channel gradient, ensuring accurate data states and reducing the likelihood of electron injection into memory cells.
Implementation Method 1
creating an isolation region in a channel of the NAND string using an isolation word line, which is kept at a low voltage during the application of program voltage to prevent residue electrons from moving and reduce the drain-induced barrier lowering effect
Implementation Method 2
maintaining residue electrons in the channel and smoothing the channel gradient, ensuring accurate data states and reducing the likelihood of electron injection into memory cells
Data Source
AI summary
Techniques are described for reducing an injection type of program disturb in a memory device. A charge isolation region is created in a channel of a NAND string on the source side of the selected word line, WLn, and spaced apart from WLn by one or more other word lines, when the program voltage is increased to a program voltage (Vpgm). The isolation region is created by applying 0 V or other low voltage to an isolation word line. The isolation region is maintained for a first portion of a time period in which Vpgm is applied. The charge isolation region can be modified based on factors associated with a risk of program disturb including the magnitude of Vpgm, the position of WLn in a set of word lines and an ambient temperature.