Charge Pump Circuit With Asynchronous Feedback Control
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Solution Overview
Problem
Charge pump circuits in consumer electronics face challenges in controlling key parameters such as output voltage, resistance, transient response, and power supply rejection ratio, particularly in achieving high current capability, fast transient response, and reduced capacitor size for efficient semiconductor area occupation.
Innovation Solution
A closed-loop charge pump circuit with asynchronous logic and phase-doubler integration, where the control loop manages the bottom voltage, phase amplitude, and switching frequency to enhance control strength, transient response, and power supply rejection ratio, while reducing output impedance and semiconductor area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional charge pump circuits are used, then basic voltage conversion is achieved, but control precision of output voltage and resistance is insufficient
Solution Approach 1:
The patent implements a control loop that continuously monitors the output voltage and adjusts the charge pump operation accordingly. The control loop compares the actual output voltage with a reference voltage and modifies the switching signals to maintain precise voltage control, directly addressing the precision control requirement while managing complexity through systematic feedback mechanisms.
Solution Approach 2:
The patent dynamically adjusts key parameters including the bottom voltage of the charge pump, the amplitude of phase signals, and the switching frequency based on control loop feedback. These parameter changes enable precise control of output voltage and resistance by optimizing the charge transfer characteristics in real-time operating conditions.
2Area of stationary object
If capacitor size is reduced to decrease area occupation, then semiconductor area is reduced, but transient response speed deteriorates
Solution Approach 1:
The patent employs dynamic control of the charge pump parameters including switching frequency and phase amplitude that adapts to transient conditions. During transient events, the control loop increases the effective charge transfer rate by adjusting these parameters, compensating for the reduced capacitor size and maintaining fast transient response without requiring larger capacitors.
Solution Approach 2:
The patent utilizes periodic switching of the charge pump stages with optimized phase relationships. The periodic charge transfer mechanism, controlled by precisely timed phase signals, enables efficient voltage regulation with smaller capacitors by maximizing the charge transfer efficiency during each switching cycle, thereby maintaining fast transient response.
3Power
If high current capability is achieved, then burning capability of OTP memory is improved, but power consumption increases
Solution Approach 1:
The patent implements a controlled continuous charge transfer mechanism where the charge pump operates in a regulated manner to deliver current only when needed for OTP memory programming. The control loop ensures that high current is supplied during programming operations while the charge pump can enter low-power states during idle periods, maintaining high current capability when required while minimizing average power consumption.
Data Source
AI summary
Charge pump stages are coupled between flying capacitor pairs and arranged in a cascaded between a bottom voltage line and an output voltage line. Gain stages apply pump phase signals having a certain amplitude to the charge pump stages via the flying capacitors. A feedback signal path from the output voltage line to the bottom voltage line applies a feedback control signal to the bottom voltage line. Power supply for the gain stages is provided by a voltage of the feedback control signal in order to control the amplitude of the pump phase signals. An asynchronous logic circuit generates the switching drive signals for the gain stages with a certain switching frequency which is a function of a logic supply voltage derived from the voltage of the feedback control signal.