Wide Dynamic Range Charge Pump for PLL Bandwidth Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional charge pump and loop filter circuits in phase-locked loop (PLL) systems lack independent adjustment of loop bandwidth and jitter transfer peaking, and are limited by the driving capacity of unity gain buffers, which restricts the dynamic range and proper control of loop bandwidth.
Innovation Solution
A wide dynamic range charge pump circuit with multiple sets of current sources and operational amplifiers is introduced, allowing independent control of loop bandwidth and jitter transfer peaking by using differential current outputs and capacitors to alleviate the limitations of unity gain buffers, enabling greater dynamic range and adjustable loop bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional charge pump with a single current output is used, then the circuit is simple to implement, but the loop bandwidth and jitter transfer peaking cannot be adjusted independently
Solution Approach 1:
The charge pump is divided into two separate current outputs (Ia and Ib), each capable of independent adjustment. Current Ia controls jitter transfer peaking while current Ib controls loop bandwidth, allowing independent optimization of both parameters without increasing overall circuit complexity significantly
Solution Approach 2:
The charge pump circuit is designed to provide multiple functions through its two current outputs: one dedicated to jitter transfer peaking control and another to loop bandwidth control. This multi-functionality enables independent adjustment of both parameters within a single integrated circuit structure
2Adaptability or versatility
If the current Ib is increased to expand loop bandwidth adjustment range, then the loop bandwidth control is improved, but the unity gain buffer driving capacity is exceeded
Solution Approach 1:
The total current requirement is segmented into two separate current paths (Ia and Ib). By controlling current Ib independently through a dedicated output, the loop bandwidth can be adjusted over a wider range without overloading the unity gain buffer, as the buffer only needs to drive the segmented portion of the total current
Solution Approach 2:
The circuit parameters are changed by independently adjusting current magnitudes through separate control paths. Current Ib is specifically optimized for loop bandwidth control with a range extending beyond what a single current output could provide, while maintaining buffer driving capability through proper current distribution
3Speed
If the unity gain buffer drives large current to achieve wide bandwidth, then the bandwidth adjustment is improved, but the buffer saturates and can no longer maintain proper operation
Solution Approach 1:
The buffer current demand is segmented into multiple independent current outputs. The unity gain buffer drives current Ia for jitter transfer peaking control, while current Ib for loop bandwidth control is provided through a separate path, preventing buffer saturation and maintaining stable operation across the full bandwidth range
Solution Approach 2:
The charge pump current sources act as intermediaries between the unity gain buffer and the loop filter. By introducing these current sources that can provide independent current paths, the buffer is relieved from directly driving large currents, preventing saturation while maintaining wide bandwidth adjustment capability
Data Source
AI summary
A wide dynamic range charge pump is provided for use in a phase-locked loop (PLL) circuit. The charge pump includes a first, second, and third set of current sources. The charge pump further includes a first capacitor having an input connected to the first set. A first operational amplifier (op amp) has an input connected to the first set output, and an output connected to the second set output and to a voltage controlled oscillator (VCO) input. A first resistor has a first end connected to the first op amp output and a second end connected to the third set. A second capacitor has an input connected to the first resistor second end, and an output connected to the second reference voltage.


