Charge Pump Burst Mode Controller for Ripple Reduction
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Solution Overview
Problem
Charge pumps face efficiency issues during light loading conditions due to variable delays and runt pulses, leading to increased voltage ripple and audible noise, especially when transitioning between bursting and pulse-skipping modes.
Innovation Solution
A burst-mode controller with a clock-reset circuit and synchronization circuit is used to trigger the transition from pulse-skipping to bursting mode, ensuring the flying capacitor is charged before discharging and preventing runt pulses, thereby reducing voltage ripple and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the charge pump operates in light loading conditions with conventional control, then power consumption is reduced, but voltage ripple increases and efficiency decreases
Solution Approach 1:
The charge pump operates in burst mode with periodic charging and discharging cycles of the flying capacitor, synchronized to a clock signal. This periodic action maintains efficient power transfer while the controlled duty cycle prevents excessive voltage ripple during light loading conditions
Solution Approach 2:
The charge pump dynamically switches between different operating modes (burst mode and pulse-skipping mode) based on load conditions. The burst-mode controller adjusts the charging duration and frequency dynamically, allowing the system to optimize between efficiency and voltage ripple suppression in real-time
2Adaptability or versatility
If the charge pump transitions between bursting and pulse-skipping modes, then adaptability to load changes is improved, but variable delays cause voltage ripple and audible noise
Solution Approach 1:
The clock-reset circuit performs preliminary action by resetting the clock signal to a predetermined state before mode transitions occur. This ensures that the flying capacitor is always charged before discharging, eliminating variable delays and preventing runt pulses that cause audible noise
Solution Approach 2:
The synchronization circuit uses feedback from the clock signal to coordinate mode transitions. By monitoring clock edges and synchronizing transitions to specific clock phases, the system eliminates timing variability and prevents harmful voltage ripple and audible noise during mode switching
3Speed
If the flying capacitor is discharged before charging in burst mode, then power transfer speed is improved, but voltage ripple increases significantly
Solution Approach 1:
The clock-reset circuit ensures preliminary charging of the flying capacitor before discharge begins. By resetting the clock to a predetermined state, the system guarantees that the capacitor is fully charged during the charging phase, preventing voltage ripple even though power transfer proceeds at high speed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces voltage ripple by 60% or more, enhancing the charge pump's efficiency and eliminating audible noise by synchronizing the bursting and skipping operations effectively.
Implementation Method 1
a charge pump with a flying capacitor
Data Source
AI summary
An apparatus is disclosed for operating a charge pump in a high-efficiency low-ripple burst mode. In an example aspect, the apparatus includes a charge pump with a flying capacitor, a switching circuit, and a burst-mode controller. The switching circuit is coupled to the flying capacitor and configured to selectively: be in a burst configuration to charge and discharge the flying capacitor based on a clock signal; or be in a pulse-skipping configuration. The burst-mode controller is coupled to the switching circuit and configured to trigger the switching circuit to transition from the pulse-skipping configuration to the burst configuration at a time that occurs between rising edges of the clock signal. The burst-mode controller is also configured to cause charging of the flying capacitor to occur for approximately half a period of the clock signal responsive to triggering the switching circuit to transition from the pulse-skipping configuration to the burst configuration.