Charge Pump Circuit Reducing Rise Time for High-Frequency RF Signals

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Solution Overview

Problem

Conventional charge pump circuits in optical disk reproducing devices experience distortion and difficulty in maintaining a 50% duty ratio for high-frequency analog RF signals, leading to jitter in the digital RF signal waveform due to long rise times and switching delays in the current mirror circuit.

Innovation Solution

A charge pump circuit with a current mirror configuration using P-channel MOS transistors and switching elements, including a dummy current path and additional switching elements to reduce distortion by ensuring continuous current flow and immediate switching states, thereby reducing the rise time of output currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional charge pump circuit is used with high-frequency analog RF signals, then the circuit structure is simple, but the rise time of output current becomes long causing distortion and difficulty in maintaining 50% duty ratio

Engineering Contradiction:
Improverise time of output currentVSAvoidcircuit structure
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The charge pump circuit is segmented into two independent current sources (first current source for charging, second current source for discharging) instead of using a single current source with a current mirror. This segmentation allows each current source to be optimized independently for fast switching and minimal distortion, resolving the contradiction between fast rise time and circuit complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit uses dynamic switching elements (switching circuit) that respond rapidly to comparator output changes, enabling the current sources to switch between charging and discharging modes instantaneously. This dynamic response eliminates the long rise time and distortion problems while maintaining a relatively simple overall circuit structure.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If the charge pump circuit uses a current mirror configuration, then the circuit design is straightforward, but switching delays occur making it difficult to maintain equal charging and discharging current values

Engineering Contradiction:
Improveequality of charging and discharging current valuesVSAvoidswitching delay
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The current mirror configuration is segmented into separate first and second current sources, each independently controlled by the switching circuit. This eliminates the switching delays inherent in current mirror configurations while ensuring that charging and discharging current values remain equal through symmetric circuit design and matched current source characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The switching circuit monitors the comparator output and rapidly switches between connecting the first current source (for charging) and the second current source (for discharging). This feedback mechanism ensures that current values remain equal and switching delays are minimized by immediately responding to changes in the digital RF signal level.

Inventive Principle:
Principle #23Feedback

3Productivity

If high-frequency analog RF signals are input to the SLC circuit, then the signal processing capability is improved, but jitter occurs in the digital RF signal waveform due to distortion

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidjitter in output waveform
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By segmenting the charge pump into separate first and second current sources with independent switching control, the circuit achieves fast response to high-frequency input signals without distortion. This maintains equal charging and discharging current values, preventing duty ratio deviation and eliminating jitter in the digital RF signal waveform while preserving high-frequency signal processing capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dynamic switching circuit responds instantaneously to high-frequency comparator output changes, enabling the charge pump to accurately track and process high-frequency analog RF signals. This dynamic response ensures equal current values are maintained during rapid switching, preventing waveform distortion and jitter while maintaining high signal processing capability.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively maintains a 50% duty ratio for the digital RF signal and reduces jitter in the waveform, ensuring accurate signal processing even with high-frequency analog RF inputs.

Implementation Method 1

a first transistor; a second transistor forming a current mirror circuit with the first transistor

Methodology Applied
Scientific EffectCurrent mirror effect:

Implementation Method 2

a switching circuit controlling itself so as to connect the first current source to the first transistor... when the input signal is of a first level, and connect the second current source to the first transistor... when the input signal is of a second level

Methodology Applied
Scientific EffectMOS transistor switching:

Implementation Method 3

a capacitor 103... Such charging and discharging of the capacitor 103 adjust the level of the mean voltage of the analog RF signal

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8058923B2Charge pump circuit and slice level control circuit
Publication Date: 2011.11.15 SEMICON COMPONENTS IND LLC
  • US8058923B2 patent drawing
  • US8058923B2 patent drawing
  • US8058923B2 patent drawing

AI summary

The invention provides a charge pump circuit which reduces rise time of an output current even when an input signal is of high frequency. PMOS1 and PMOS2 have gates connected to each other, and the gate of the PMOS1 is connected to the drain thereof. A supply potential (Vdd) is applied to the sources of the PMOS1 and the PMOS2, and the PMOS1 and the PMOS2 form a current mirror circuit. First and second switching elements and a first constant-current source are connected to the drain of the PMOS2. A connection point (a node) of the first switching element and the second switching element is connected to an output terminal. The drain of the PMOS1 is connected to the first constant-current source through a third switching element, and connected to a second constant-current source through a fourth switching element.