Charge Pump Current Clamping Circuit for Parasitic Spike Reduction
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Solution Overview
Problem
Charge pumps in electronic circuits, such as those used in Delay Locked Loops (DLLs) and Phase-Locked Loops (PLLs), experience parasitic current spikes during transistor switching, leading to errors and phase offsets due to asymmetrical current spikes and tail outs, which are not effectively managed by existing solutions.
Innovation Solution
The implementation of a current clamping circuit within the charge pump that provides additional paths for current during transistor switching off, using pairs of transistors and delay introducing inverter circuitry to minimize parasitic spikes and leakage current, allowing for controlled voltage transitions and reduced error.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistor switching is used in charge pump, then voltage conversion function is achieved, but parasitic current spikes are generated causing phase errors
Solution Approach 1:
A clamp circuit is introduced as an intermediary component between the switching transistors and the output node. This clamp circuit captures and dissipates the parasitic current spikes generated during transistor switching, preventing them from reaching the output and causing phase errors in the PLL/DLL system.
Solution Approach 2:
The harmful parasitic current spikes are redirected through the clamp circuit where they are converted into a beneficial effect. The clamp circuit uses the energy from these spikes to charge a clamp capacitor, which then provides a stable reference for voltage clamping, effectively transforming the harmful spikes into a useful voltage reference mechanism.
2Speed
If switching speed is increased to improve response, then transient response is improved, but parasitic spikes become more severe
Solution Approach 1:
The clamp circuit serves as a mediator that decouples the relationship between switching speed and parasitic spike severity. By providing an alternative path for spike current through the clamp transistor and capacitor, the system can operate at higher switching speeds without proportionally increasing output spike magnitude, as the clamp circuit absorbs the excess energy.
3Reliability
If existing clamp circuits are used, then some current control is achieved, but asymmetrical spikes and tail outs are not effectively managed
Solution Approach 1:
The clamp circuit is designed with asymmetric characteristics that match the asymmetric nature of the parasitic spikes. The clamp transistor and capacitor are configured to provide different clamping levels for positive and negative spikes, effectively managing the asymmetrical spike patterns and tail out effects that symmetric clamp circuits cannot handle.
Data Source
AI summary
A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump.