Charge Pump Clock Cycle Adjustment for Memory Power Efficiency
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Solution Overview
Problem
Existing memory devices consume high current due to the charge pump's operation, particularly when the cycle of the clock signal is short, leading to inefficiencies in power management.
Innovation Solution
A memory device with a charge pump that generates an operating voltage for multiple planes based on a first clock signal, and an operation control circuit that adjusts the clock signal's cycle to a longer second cycle when fewer planes are operating, thereby reducing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the charge pump operates with a short clock signal cycle to improve operation speed, then the processing speed is improved, but the current consumption increases
Solution Approach 1:
The patent applies dynamics by making the clock signal cycle length adjustable rather than fixed. The operation control circuit dynamically changes the clock cycle based on the number of operating planes: using a first cycle when more planes are active and a second (longer) cycle when fewer planes are active. This dynamic adjustment allows the system to optimize between speed and power consumption according to actual operational demands.
Solution Approach 2:
The patent changes the parameter of clock signal cycle length to control the charge pump's operation. By varying the cycle duration between a first cycle and a second cycle, the system can adjust the charge pump's operating frequency, thereby controlling current consumption while maintaining adequate operation speed for the number of planes being serviced.
2Reliability
If the charge pump generates voltage for all planes simultaneously to ensure complete operation, then the operational completeness is improved, but the power consumption increases
Solution Approach 1:
The patent applies local quality by tailoring the charge pump's operation to the specific needs of each plane. Instead of uniformly operating at full capacity for all planes, the system adjusts the clock cycle based on how many planes actually require operation. This allows the system to maintain reliable operation for the active planes while reducing power consumption when fewer planes are in use.
Solution Approach 2:
The patent implements partial action by operating the charge pump at reduced capacity when not all planes are active. When fewer than a threshold number of planes require operation, the system uses a longer clock cycle that corresponds to reduced charge pump activity, avoiding excessive power consumption while still providing complete operation for the planes that do need it.
3Device complexity
If the memory device uses a fixed clock cycle for the charge pump to simplify control, then the control complexity is reduced, but the power efficiency decreases
Solution Approach 1:
The patent applies preliminary action by having the operation control circuit count the number of operating planes before adjusting the clock cycle. The control circuit determines how many planes are active and then selects the appropriate clock cycle (first or second) in advance, avoiding the need for continuous complex control while achieving power efficiency through pre-determined operational modes.
Solution Approach 2:
The patent implements feedback by having the operation control circuit monitor the number of operating planes and use this information to adjust the clock cycle accordingly. This feedback mechanism allows the system to automatically optimize power efficiency based on actual operational conditions without requiring overly complex manual control, balancing simplicity and efficiency.
Data Source
AI summary
According to an embodiment of the present disclosure, a memory device includes a memory cell array including a plurality of planes; a charge pump configured to generate an operating voltage used for an operation on each of the plurality of planes according to a first clock signal having a first cycle; page buffers each configured to store pass data representing whether an operation of each of the plurality of planes has been completed; and an operation control circuit configured to, based on a number of the pass data received from the page buffers, control the charge pump to generate the operating voltage according to a second clock signal having a second cycle that is longer than the first cycle.