Charge Pump Clock Cycle Counting for Fault Detection

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Solution Overview

Problem

Non-volatile memory systems face challenges in detecting faults during high-voltage operations, leading to potential component damage and data loss, as faults are typically detected after they occur, allowing for no immediate response.

Innovation Solution

A method and system that utilize charge pump clock cycle counts to detect potential faults by comparing differences in clock cycle counts between pulses, allowing for proactive corrective actions before faults occur, such as suspending operations or shutting down the charge pump.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fault detection is performed after high-voltage operations complete, then the detection mechanism is simple, but component damage and data loss occur before detection

Engineering Contradiction:
Improvefault detection timingVSAvoiddetection system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by monitoring charge pump clock cycle counts during high-voltage operations to detect faults before they cause component damage or data loss. The system proactively identifies potential faults by analyzing clock cycle variations, enabling preventive measures to be taken before actual damage occurs, thus resolving the contradiction between early fault detection and system complexity.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If clock cycle counting is implemented during charge pump operations, then fault detection capability improves, but system complexity increases

Engineering Contradiction:
Improvefault detection precisionVSAvoidcounting circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies self-service by utilizing the existing charge pump clock signal that already exists in the memory system. The clock cycle counter simply counts pulses from the existing clock source without requiring additional complex measurement circuits. This approach achieves precise fault detection by leveraging resources already present in the system, thereby minimizing the increase in system complexity while improving measurement precision.

Inventive Principle:
Principle #25Self-service

3Reliability

If fault monitoring is performed continuously during operations, then reliability improves, but processing overhead increases

Engineering Contradiction:
Improveoperational reliabilityVSAvoidoperation throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies mechanics substitution by replacing complex continuous monitoring mechanisms with a simple clock cycle counting approach. The system monitors faults by counting clock cycles during charge pump operations, which is a lightweight operation that does not significantly impact processing throughput. This substitution maintains high operational reliability while minimizing processing overhead, as the counting operation integrates seamlessly with existing system operations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10991447B2Clock frequency counting during high-voltage operations for immediate leakage detection and response
Publication Date: 2021.04.27 SANDISK TECHNOLOGIES LLC
  • US10991447B2 patent drawing
  • US10991447B2 patent drawing
  • US10991447B2 patent drawing

AI summary

A method for detecting faults in a memory system includes performing an operation on at least one memory cell of the memory system. The method also includes receiving, during performance of the operation, a first clock cycle count for a first pulse of a charge pump associated with the at least one memory cell. The method also includes receiving, during performance of the operation, a second clock cycle count for a second pulse of the charge pump. The method also includes determining whether a fault will occur based on a difference between the first clock cycle count and the second clock cycle count.