Charge Pump Circuit Clock Feed-Through Reduction
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Solution Overview
Problem
Charge pump circuits in PLL systems suffer from clock feed-through, charge injection, and up/down current mismatch due to voltage swings, leading to spurious noise in output signals, which deteriorate signal quality.
Innovation Solution
The charge pump circuit design incorporates a first comparator, PMOS and NMOS tuners, current mirrors, and switches, which reduce voltage swings by moderating channel length modulation effects and forming equivalent series capacitance, thereby minimizing clock feed-through and charge injection, and maintaining current balance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PMOS switch and NMOS switch are used for charge pump operation, then charge pumping function is achieved, but clock feed-through and charge injection occur causing voltage swing at output
Solution Approach 1:
The charge pump circuit is divided into separate charge pumping path and current mirror path. The charge pump switches (PMOS/NMOS) are segmented from the current mirror transistors, with the current mirror path using dedicated transistors (PMOS current mirror transistor and NMOS current mirror transistor) that are controlled by the same control signals but operate independently from the charge transfer switches. This segmentation prevents the voltage swing at the output node from directly affecting the charge pump switches, thereby reducing clock feed-through and charge injection effects.
Solution Approach 2:
A capacitor is introduced as an intermediary element connected between the output node and ground. This capacitor acts as a buffer that isolates the voltage swing at the output node from the charge pump switches and current mirror transistors. By providing a low-impedance path to ground for high-frequency switching artifacts, the capacitor reduces the amplitude of voltage swings that would otherwise cause clock feed-through and charge injection, thereby improving signal quality without compromising charge pumping functionality.
2Reliability
If voltage level at charge pump output increases, then charge current decreases, but this causes up/down current mismatch and spurious noise
Solution Approach 1:
The circuit employs a feedback mechanism where the voltage at the output node is continuously monitored and fed back to the control logic. When the output voltage increases (indicating excessive charge or insufficient discharge), the control signals adjust the operation of the charge pump switches and current mirror transistors to restore current balance. This feedback loop dynamically compensates for voltage-induced current mismatches, preventing spurious noise and maintaining signal quality.
Solution Approach 2:
The control signals that govern the charge pump switches and current mirror transistors are dynamically adjusted based on the output voltage level. When voltage swing causes current mismatch, the control logic modifies the switching timing, duration, or amplitude of the control signals to compensate for the parameter changes in the transistors' operating conditions. This parameter adjustment ensures that the charge and discharge currents remain balanced despite voltage variations at the output node.
Data Source
AI summary
A charge pump circuit includes a first comparator, a PMOS tuner, a first current mirror, a first NMOS transistor, a first PMOS switch, an NMOS tuner, a second current mirror, a first PMOS transistor and a first NMOS switch. The first PMOS switch is coupled between the PMOS tuner and a first output PMOS transistor of the first current mirror, thus the parasitic capacitor formed between the gate and the drain of the first PMOS switch, the parasitic capacitor formed between the gate and the source of the first output PMOS transistor, and the parasitic capacitor formed between the gate and the drain of the first output PMOS transistor are equivalently coupled in series, lowering the capacitance between the PMOS tuner and the charge pump output, and reducing the clock feed through and the charge injection effect in the charge pump circuit.


