Switched-Capacitor Charge Pump Clocking for Ripple and Peak Current Control
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Solution Overview
Problem
Conventional charge pump designs for eDRAM suffer from inefficiencies related to capacitive loading, voltage ripples, and peak current density, which affect power management in demanding applications.
Innovation Solution
A switched-capacitor charge pump with an enhanced two-phase topology, utilizing first and second switched capacitors, cross-coupled transistors, and programmable clock signals to achieve efficient clock edge handling and reduced clock loading, along with clamping circuits for override modes and adjustable clock signal widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional charge pump designs are used, then voltage multiplication is achieved, but voltage ripples and peak current density increase
Solution Approach 1:
The charge pump is divided into multiple parallel pumping units (first and second switched capacitors with associated transistors), where each unit operates in alternating phases. This segmentation distributes the current demand across multiple paths, reducing peak current density and smoothing voltage ripples while maintaining effective voltage multiplication.
2Area of stationary object
If deep-trench capacitors are used in eDRAM, then footprint is reduced, but power management complexity increases
Solution Approach 1:
The charge pump employs periodic two-phase non-overlapping clock signals to control the switching of capacitors and transistors in a regular cyclic manner. This periodic operation simplifies the power management control logic compared to continuous control schemes, while efficiently charging deep-trench capacitors with reduced footprint.
3Speed
If clock frequency is increased to improve speed, then memory access time decreases, but power consumption increases
Solution Approach 1:
The charge pump incorporates programmable clock signals with adjustable frequencies and duty cycles, allowing dynamic optimization of the balance between speed and power consumption. The system can adapt the clock parameters based on operational requirements, achieving fast memory access when needed while reducing power consumption during normal operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a more efficient energy conversion with tight active and standby power control, reducing inefficiencies and enabling a compact design for improved power management in eDRAM systems.
Implementation Method 1
first and second switched capacitors (62, 64; 122, 124) whose input nodes are coupled to receive a clock signal
Implementation Method 2
first and second cross-coupled transistors (76, 78; 128, 130) connected to second nodes of the switched capacitors
Data Source
AI summary
A switched-capacitor charge pump comprises a two-phase charging circuit, cross-coupled transistors connected to output nodes of the switched capacitors, and a pump output connected to source terminals of the cross-coupled transistors. The charge pump has side transistors for boosting charge transfer, and gating logic of the side transistors includes level shifters which control connections to the pump output or a reference voltage. Negative and positive charge pump embodiments are provided. The charging circuit advantageously utilizes non-overlapping wide and narrow clock signals to generate multiple gating signals. The pump clock circuit preferably provides independent, programmable adjustment of the widths of the wide and narrow clock signals. An override mode can be provided using clamping circuits which shunt the pump output to the second nodes of the switched capacitors.