Charge Pump Compensation Circuit for PLL Jitter Reduction
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Solution Overview
Problem
Current phase-locked loops (PLLs) face increased jitter due to current mismatch in the charge pump, limiting the operating range and degrading performance, as existing solutions restrict the charge pump's operation to minimize this mismatch.
Innovation Solution
Incorporating a compensation circuit with pull-up and pull-down circuits that provide varying compensation currents to the charge pump, adjusting based on the voltage level of the output node to reduce current mismatch and enhance the operating range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the charge pump operates with a wide range of input signals, then the operating range is increased, but current mismatch increases causing jitter
Solution Approach 1:
The patent dynamically adjusts the reference current based on the output voltage level of the charge pump. When the output voltage is high, a larger compensation current is applied to maintain current matching. When the output voltage is low, a smaller compensation current is applied. This parameter change approach allows the charge pump to operate across a wide voltage range while maintaining current matching accuracy, thus expanding the operating range without increasing jitter.
Solution Approach 2:
The patent implements a feedback mechanism where the output voltage level of the charge pump is monitored and used to control the compensation current generation. The feedback signal from the output node modulates the reference current provided to the charge pump, creating a closed-loop system that automatically adjusts to maintain current matching. This feedback approach enables the system to adapt to varying operating conditions while minimizing current mismatch and jitter.
2Reliability
If the difference between up signal and down signal is minimized, then current mismatch is reduced, but the operating range is limited
Solution Approach 1:
The patent applies preliminary compensation by generating a compensation current in advance based on the expected output voltage level. Before the charge pump operates with large signal differences, the compensation current is already prepared and applied to counteract the anticipated current mismatch. This preliminary action allows the charge pump to handle large signal differences (wide operating range) while maintaining current matching through pre-applied compensation.
Solution Approach 2:
The patent changes the reference current parameter dynamically based on the output voltage level. Instead of using a fixed reference current that would require small signal differences to maintain matching, the system adjusts the reference current parameter to match the operating conditions. This parameter change enables the charge pump to operate with large signal differences while maintaining current matching accuracy.
3Reliability
If compensation current is increased to reduce current mismatch, then jitter is reduced, but circuit complexity increases
Solution Approach 1:
The patent implements a self-service mechanism where the charge pump circuit generates its own compensation current using its output voltage level as the control signal. The circuit uses internal resources (output voltage) to create the compensation current, eliminating the need for external complex control circuits. This self-service approach reduces jitter through compensation current while minimizing additional circuit complexity by utilizing existing circuit elements.
Data Source
AI summary
Provided are a semiconductor device and a phase-locked loop (PLL) including the same. The semiconductor device including an output node from which an output signal is output, a first transistor which has a drain connected to the output node and is gated by a first signal to increase a voltage level of the output node, a second transistor which has a drain connected to the output node, is gated by a second signal which is a complementary signal of the first signal, and reduces the voltage level of the output node, a pull-up circuit which provides a first compensation current varying according to the voltage level of the output node to a source of the first transistor, and a pull-down circuit which provides a second compensation current varying according to the voltage level of the output node to a source of the second transistor.