Charge Pump Using Complementary Clocks to Reduce Body Effects

The patent changes the operating parameters of standard low-voltage transistors by applying appropriate voltage levels to their terminals. By carefully controlling the gate, source, and drain voltages within the transistor's safe operating range, the transistor can handle high-voltage operation without requiring specialized high-voltage transistor structures. This parameter-based approach allows standard transistors to perform high-voltage charge pumping functions.

The patent makes standard low-voltage transistors perform multiple functions including high-voltage switching and voltage pumping. The same transistor structure is used for both normal logic operations and high-voltage charge pump operations, eliminating the need for separate high-voltage transistor components. This universal approach simplifies the device architecture and improves integration density.

The patent optimizes the voltage parameters applied to the transistor terminals to minimize body effects. By maintaining appropriate voltage relationships between the bulk, source, and drain terminals, and by using complementary clock signals with proper voltage levels, the charge pump achieves efficient negative voltage generation while minimizing the harmful body effect that would otherwise reduce performance.

The patent uses complementary periodic clock signals to alternately charge and discharge the pumping capacitors. This periodic switching action, synchronized between n-type and p-type transistors, enables continuous charge pumping operation that generates negative voltages while minimizing body effect losses through proper timing and voltage sequencing.

The patent achieves reliable high-voltage handling by changing the operating parameters of standard transistors rather than using physically larger high-voltage transistors. By carefully controlling voltage levels, switching sequences, and terminal connections, standard-sized transistors can reliably handle high-voltage charge pump operations, thereby maintaining small device area and high integration density.

The patent merges the functions of high-voltage handling and standard logic operations into the same transistor structures. Instead of having separate high-voltage and low-voltage transistor circuits, the design combines these functions in unified transistor cells that operate reliably across different voltage regimes, reducing the total area required for the charge pump circuit.