Charge Pump Coupling Circuit for Signal Line Voltage Recovery

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor circuits powered by charge pumps face inefficiencies, leading to significant power wastage during voltage transitions and capacitive charging/discharging of signal lines, which is exacerbated by the high switching speeds and capacitance in these circuits.

Innovation Solution

A coupling circuit is introduced to manage the voltage switching between different levels, allowing the stored charge on signal lines to be discharged back to the charge pump, minimizing power wastage by using a PMOS transistor to couple the common supply node to the charge pump, and a differential amplifier to control the discharge process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a charge pump is used to generate voltages with different magnitude or polarity, then voltage flexibility is improved, but power efficiency deteriorates

Engineering Contradiction:
Improvevoltage flexibilityVSAvoidpower efficiency
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent captures the energy that would normally be wasted when discharging capacitive load (signal lines) and feeds it back to the charge pump. By converting this harmful energy dissipation into a beneficial energy source, the system recovers power that would otherwise be lost, directly addressing the efficiency problem while maintaining voltage flexibility

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

Instead of discarding the energy stored in capacitive signal lines during voltage transitions, the patent implements a recovery mechanism that captures this energy and returns it to the charge pump. This prevents waste and improves overall power efficiency while preserving the ability to generate different voltage levels

Inventive Principle:
Principle #34Discarding and recovering

2Speed

If transistors are turned on simultaneously during signal line transition, then switching speed is improved, but power consumption increases

Engineering Contradiction:
Improveswitching speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent converts the harmful effect of simultaneous transistor conduction (power waste during transitions) into a beneficial energy source. The energy dissipated during rapid switching is captured and fed back to the charge pump, allowing fast switching to occur without proportional power penalty

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Speed

If signal line capacitance is increased for higher speed operation, then switching speed is improved, but power consumption increases

Engineering Contradiction:
Improveswitching speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent takes the energy that would be wasted in charging and discharging larger capacitive loads and converts it into a useful energy source for the charge pump. This allows the system to operate larger capacitive loads at high speed without proportional increases in power consumption from the external supply

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces power consumption by efficiently managing voltage transitions and capacitive discharge, minimizing gate-induced drain leakage and overall power wastage in semiconductor memory devices.

Implementation Method 1

Another phenomena that commonly consumes power when transitioning of a signal line from one binary voltage to another results from the capacitive nature of many signal lines. Signal lines, particularly long signal lines, may have substantial capacitance, which allows them to store substantial charge.

Methodology Applied
Scientific EffectCapacitive discharge: Capacitance

Implementation Method 2

This approach reduces power consumption by efficiently managing voltage transitions and capacitive discharge, minimizing gate-induced drain leakage and overall power wastage in semiconductor memory devices.

Methodology Applied
Scientific EffectGate-induced drain leakage:

Data Source

PatentUS8351272B2Apparatuses and methods to reduce power consumption in digital circuits
Publication Date: 2013.01.08 MICRON TECHNOLOGY INC
  • US8351272B2 patent drawing
  • US8351272B2 patent drawing
  • US8351272B2 patent drawing

AI summary

An apparatus and method for reducing power consumption in digital circuits, particularly circuits including a charge pump. A driver may selectively drive a signal line, such as a memory device wordline, between a first voltage, which may be a voltage generated by the charge pump, and a different second voltage. A coupling circuit may be coupled between the signal line and the charge pump to selectively couple the signal line to the charge pump responsive to the signal line being driven from the first voltage to the second voltage. For example, the first voltage may be a voltage generated by the charge pump, and the second voltage may be a voltage having a lesser magnitude. As a result, the voltage on the signal line may be discharged into the charge pump when the voltage of the signal line transitions from the first voltage to the second voltage.