Charge Pump Circuit Using Depletion Transistors
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Solution Overview
Problem
Conventional charge pump circuits using MOS transistors suffer from reduced power efficiency due to increased threshold voltage caused by the substrate effect, especially as the number of boosting stages increases, leading to decreased boosting efficiency and a limited input voltage range.
Innovation Solution
The use of N-channel depletion transistors in the high-voltage clock generating circuit and P-channel enhancement transistors as charge transfer devices, along with an input voltage limiting circuit, to mitigate the substrate effect and prevent parasitic bipolar operations, thereby maintaining power efficiency across various stages and input voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the number of boosting stages is increased to achieve higher output voltage, then the boosting capability is improved, but the power efficiency is reduced due to accumulated threshold voltage drops
Solution Approach 1:
The patent changes the type of MOS transistor used in the charge pump circuit from enhancement type to depletion type. Depletion type MOS transistors have a negative threshold voltage characteristic, which compensates for the threshold voltage drops accumulated across multiple boosting stages. This parameter change in transistor type allows the circuit to maintain higher power efficiency even when the number of boosting stages is increased to achieve higher output voltages.
2Ease of manufacture
If conventional enhancement type MOS transistors are used, then the circuit is easy to manufacture, but the threshold voltage increases due to substrate effect reducing boosting efficiency
Solution Approach 1:
The patent changes the transistor type from enhancement type to depletion type, which fundamentally alters the threshold voltage parameter. Depletion type MOS transistors inherently have negative threshold voltages, which counteract the substrate effect that causes threshold voltage increases in enhancement type transistors. This parameter change maintains boosting efficiency while remaining compatible with standard CMOS manufacturing processes.
3Adaptability or versatility
If the input voltage range is expanded, then the adaptability is improved, but parasitic bipolar operations occur reducing power efficiency
Solution Approach 1:
The patent changes the transistor operation mode by using depletion type MOS transistors instead of enhancement type. The negative threshold voltage characteristic of depletion type transistors prevents the gate-to-source voltage from reaching levels that would trigger parasitic bipolar transistor activation. This allows the circuit to operate across a wider input voltage range without experiencing the efficiency losses associated with parasitic bipolar operations.
Data Source
AI summary
Provided is a charge pump circuit whose power efficiency is not reduced even when a threshold voltage of a transistor is increased by a substrate effect with an increase in the number of stages. A depletion transistor is used as an N-channel transistor included in an inverter of a high-voltage clock generating circuit. A P-channel enhancement transistor is used as a charge transfer device.