Low-offset charge pump for duty cycle stabilizer noise reduction

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Solution Overview

Problem

Continuous-time duty cycle stabilizers are susceptible to noise and errors due to continuous integration, which affects the precision of clock signal duty cycles and thereby the performance of analog-to-digital converters.

Innovation Solution

Implementing a low-offset charge pump circuit within a duty cycle stabilizer that uses a phase detector, loop filter, and delay cell to detect phase differences and generate a clock signal with a predetermined duty cycle, reducing noise susceptibility by focusing on signal-transition edges rather than continuous integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If continuous-time integration is used in duty cycle stabilizer, then the circuit can continuously regulate duty cycle, but noise and errors increase due to continuous integration

Engineering Contradiction:
Improveduty cycle precisionVSAvoidnoise susceptibility
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from continuous-time integration to periodic sampling at signal-transition edges. The phase detector samples the clock signal only at rising or falling edges rather than continuously, converting a continuous process into a periodic one. This reduces noise accumulation while maintaining duty cycle regulation capability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent extracts only the critical moments (signal-transition edges) from the continuous signal for processing. By focusing measurement and control actions only at these discrete transition points rather than throughout the entire signal period, the circuit eliminates unnecessary noise exposure during non-critical periods.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If continuous-time integration is used, then duty cycle can be continuously monitored, but measurement precision decreases due to noise accumulation

Engineering Contradiction:
Improveduty cycle measurement accuracyVSAvoidnoise impact
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

Measurement is performed periodically at signal edges rather than continuously. The phase detector generates measurement impulses only at rising or falling edges, converting continuous monitoring into discrete periodic sampling. This reduces noise accumulation while capturing the essential duty cycle information.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent replaces the mechanical continuous integration process with an electronic digital sampling approach. Instead of continuously integrating the analog signal, the system uses digital logic to detect edges and generate measurement impulses, which are then processed through a loop filter to achieve precise duty cycle measurement with reduced noise sensitivity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8294497B2Low-offset charge pump, duty cycle stabilizer, and delay locked loop
Publication Date: 2012.10.23 ANALOG DEVICES INC
  • US8294497B2 patent drawing
  • US8294497B2 patent drawing
  • US8294497B2 patent drawing

AI summary

A charge pump circuit can include a first pair of transistors having connected sources and gates configured to receive a first pump signal and an inverse first pump signal and a second pair of transistors having connected drains and gates configured to receive a second pump signal and an inverse second pump signal, sources of the second pair of transistors being connected to drains of the first pair of transistors at first and second connection nodes, wherein the first and second pair of transistors are all of the same transistor type and provide an output current in response to the first and second pump signals. The charge pump circuit can also include a voltage stabilizer circuit connected to the second connection node and configured to regulate the second connection node to have a voltage within a predetermined range about a selectable voltage. Duty cycle stabilizers and control loops such as delay locked loops can include the charge pump circuit.