Charge Pump Efficiency with Low Supply Voltages
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Solution Overview
Problem
Charge pumps face challenges in efficiently generating desired output voltages as supply levels decrease, leading to increased demands on system resources such as area and power consumption when trying to maintain performance.
Innovation Solution
The implementation of a helper pump and optimized clock generation circuitry, including a segmented multi-supply inverter, allows for efficient boosting of clock signals and gate clock signals, reducing the need for additional stages and minimizing power consumption by using a 3V auxiliary pump.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional charge pump designs are used with lower supply voltages, then the output voltage level becomes insufficient, but increasing the number of stages or branches increases area and power consumption
Solution Approach 1:
The patent changes the voltage parameter by introducing a boosted clock signal with amplitude greater than Vcc (e.g., 2*Vcc) to drive the capacitors. This parameter change allows the charge pump to achieve higher output voltage levels without increasing the number of stages, thereby maintaining power consumption at acceptable levels while ensuring sufficient output voltage.
Solution Approach 2:
The patent introduces an auxiliary charge pump circuit as an intermediary component that generates the boosted clock signal. This auxiliary pump acts as a mediator between the main charge pump stages and the clock signal source, enabling the main stages to operate with higher voltage swings without requiring additional main stages, thus avoiding increased area and power consumption.
2Reliability
If the number of charge pump stages is increased to maintain output performance with lower supply voltages, then area requirements increase
Solution Approach 1:
By changing the clock signal voltage parameter to a boosted level (greater than Vcc), the patent enables each stage to contribute more voltage gain. This allows achieving the same or better output voltage performance with fewer stages, directly reducing the total area required for the charge pump circuit.
Solution Approach 2:
The patent introduces dynamic voltage boosting through the auxiliary charge pump that generates time-varying boosted clock signals. This dynamic approach allows the system to achieve higher effective voltage levels during operation without permanently increasing the physical size or number of stages of the main charge pump circuit.
3Reliability
If conventional clock signals are used without boosting, then power consumption is lower, but output voltage performance deteriorates with lower supply levels
Solution Approach 1:
The auxiliary charge pump serves as an intermediary that consumes a controlled amount of power to generate boosted clock signals, which in turn enable the main charge pump stages to deliver superior output voltage performance. The power consumed by the auxiliary pump is traded against the improved performance of the main pump, achieving better overall system efficiency.
Solution Approach 2:
The auxiliary charge pump performs preliminary action by pre-boosting the clock signals before they are applied to the main charge pump stages. This preliminary voltage boosting ensures that the main stages operate with optimal voltage swings from the outset, maximizing their voltage multiplication efficiency and output performance without requiring excessive power from the main supply.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains output performance with lower supply levels while significantly reducing power consumption and area requirements, making it more efficient and easier to integrate into existing designs.
Implementation Method 1
a capacitor coupled to switches between an input and an output. During one clock half cycle, the charging half cycle, the capacitor couples in parallel to the input so as to charge up to the input voltage. During a second clock cycle, the transfer half cycle, the charged capacitor couples in series with the input voltage so as to provide an output voltage twice the level of the input voltage.
Implementation Method 2
a transistor connected between the input and output of the first stage
Data Source
AI summary
A charge pump system uses a helper pump to use in generating a boosted clock signal to use for a capacitor of a stage of a charge pump and also for the gate clock of the stage. This can be particularly useful in applications with lower supply levels, where the helper pump can be used to provide an amplitude higher than the supply level, that can then be added to the supply level for the boosted clock signal and then added again to the supply level for the gate clock. Further advantages can be obtained by using the helper or auxiliary pump as an input to an optimized inverter circuit that receives an input clock and has an output that initially rises to the supply level then subsequently to the auxiliary pump's level.