Charge Pump Circuit Dynamic Frequency Leakage Current
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Solution Overview
Problem
Conventional charge pump circuits require large capacitors to manage leakage currents in memory arrays, leading to increased size and reduced integration, while also consuming more power due to low frequency clock driving signals to control peak currents.
Innovation Solution
A charge pump circuit design that includes a clock driving unit, voltage boosting unit, and current mirror units to dynamically adjust the frequency of the clock driving signal based on leakage current load, using a zero-threshold NMOS tube and PMOS transistors to minimize power consumption and size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If large capacitors are used to manage leakage currents in memory arrays, then the charge transfer capability is improved, but the circuit size increases and integration is reduced
Solution Approach 1:
The patent applies dynamic frequency adjustment of the clock driving signal based on detected leakage current levels. The clock driving unit dynamically changes the frequency of the clock signal to match the actual leakage current load, allowing the charge pump to maintain adequate charge transfer capability without requiring oversized capacitors. This dynamic adaptation resolves the contradiction by providing just-enough charge transfer capability rather than over-provisioning with large capacitors.
Solution Approach 2:
The patent changes the frequency parameter of the clock driving signal in response to leakage current variations. By adjusting this key parameter dynamically, the charge pump adapts its charge transfer rate to match the actual needs of the memory array, eliminating the need for large capacitors while maintaining sufficient charge transfer capability.
2Use of energy by moving object
If low frequency clock driving signals are used to control peak currents, then power consumption is reduced, but the charge transfer efficiency decreases
Solution Approach 1:
The patent implements dynamic frequency adjustment where the clock driving unit changes the frequency of the clock signal based on the detected leakage current load. When leakage current is high, frequency increases to maintain charge transfer efficiency; when leakage current is low, frequency decreases to reduce power consumption. This dynamic behavior resolves the contradiction by optimizing both power consumption and charge transfer efficiency under different operating conditions.
Solution Approach 2:
The patent employs a feedback mechanism where the frequency of the clock driving signal is adjusted according to the leakage current detected from the memory array. This closed-loop control ensures that the charge pump operates at the optimal frequency to match the actual charge demand, preventing both excessive power consumption and insufficient charge transfer efficiency.
3Device complexity
If fixed frequency clock driving signals are used, then the circuit complexity is reduced, but the adaptability to leakage current variations is poor
Solution Approach 1:
The patent introduces dynamic frequency adjustment capability to the charge pump circuit. The clock driving unit responds to leakage current variations by changing the clock signal frequency, enabling the circuit to adapt to different operating conditions. This dynamic feature is implemented with minimal additional complexity, primarily through control logic that adjusts frequency based on leakage current detection.
Solution Approach 2:
The patent changes the frequency parameter of the clock driving signal based on detected leakage current levels. This parameter adjustment enables the circuit to adapt to varying leakage current loads without requiring a completely complex control system, achieving adaptability through simple parameter modulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design reduces peak current and power consumption by adjusting the clock driving signal frequency in response to leakage current load, maintaining required charge transfer without increasing circuit size, thus achieving a compact and low-power charge pump circuit.
Implementation Method 1
charge pump circuits, which are used to generate a high voltage for programming and erasing from a low power-supply voltage
Implementation Method 2
an N-type Metal-Oxide-Semiconductor (NMOS) tube with a connection mode in a diode (i.e., a gate electrode is connected with a drain electrode)
Data Source
AI summary
Charge pump circuit and memory are provided. The charge pump circuit includes a clock driving unit, a voltage boosting unit, a boosting swing control unit, a first and second NMOS tubes, a first and second current mirror units. The clock driving unit is adapted to form and output clock driving signals to the voltage boosting unit. The voltage boosting unit is adapted to boost voltage and output it to the boosting swing control unit and the first current minor unit. The boosting swing control unit is adapted to output boosting swing control signals to the first NMOS tube. The first current minor unit is to output first mirror current and the second current minor unit is to minor the first mirror current and output second minor current. Frequency of the clock driving signal varies with leakage current load, and size of the charge pump circuit and power consumption are reduced.