Charge Pump Gating in High-Density Memory to Reduce Power Noise
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Solution Overview
Problem
As memory devices increase in size and memory density, the conventional activation of all charge pumps leads to interference and inefficiency, particularly during operations with varying voltage demands, such as read and refresh operations, causing voltage drop noise and excessive current consumption.
Innovation Solution
The implementation of a selective gating mechanism for charge pumps, allowing only the necessary charge pump cores to be activated based on the specific operation's demand, using a programmable charge pump circuit with logic for controlling the activation of charge pump cores through control signals, thereby reducing unnecessary power consumption and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If all charge pumps are activated in high density memory devices, then voltage supply capability is improved, but power consumption and voltage drop noise increase
Solution Approach 1:
The charge pump circuit is divided into multiple independent charge pump cores (first charge pump core, second charge pump core, etc.), each capable of operating independently. This segmentation allows selective activation of only the necessary charge pump cores based on the specific operation's voltage demands, rather than activating all charge pumps simultaneously, thereby reducing unnecessary power consumption while maintaining adequate voltage supply capability.
Solution Approach 2:
The system dynamically adjusts the number of active charge pump cores based on real-time operational requirements. During read operations, only the first charge pump core is activated, while during refresh operations, both first and second charge pump cores are activated. This dynamic configuration optimizes the balance between voltage supply capability and power consumption by matching the active charge pump resources to the actual demand of each operation type.
2Power
If all charge pumps are activated, then voltage supply capability is improved, but voltage drop noise increases
Solution Approach 1:
By segmenting the charge pump circuit into multiple independent cores with separate control, the system can activate only the necessary cores for each operation. This reduces the total current drawn from the power supply at any given time, thereby minimizing voltage drop noise generated by simultaneous charge pump operations while still providing adequate voltage supply capability for the specific operation being performed.
Solution Approach 2:
The system activates only the minimum necessary charge pump cores required for each specific operation rather than all available cores. During read operations, only one core is activated; during refresh operations, two cores are activated. This partial activation approach provides sufficient voltage supply capability for each operation type while avoiding the excessive current draw that would generate harmful voltage drop noise.
3Loss of energy
If selective gating of charge pumps is implemented, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The charge pump circuit is segmented into multiple independently controllable cores, each with its own control logic. This segmentation enables selective gating of individual charge pump cores based on operation type, reducing power consumption. The control complexity is managed by implementing simple operation-type-based control logic that determines which cores to activate, rather than requiring complex dynamic control mechanisms.
Solution Approach 2:
The system implements dynamic control of charge pump core activation based on the detected operation type (read or refresh). This dynamic gating mechanism reduces power consumption by activating only the necessary charge pump cores for each operation. The control complexity is kept manageable by using operation-type-based control logic rather than more complex real-time monitoring and adjustment mechanisms.
Data Source
AI summary
Memory devices may have internal circuitry that employs voltages higher than voltages provided by an external power source. Charge pumps are DC/DC converters that may be used to generate, internally, higher voltages for operation. The number of available charge pumps in a memory device may be higher than the number used for certain memory operations. Gating circuitry may be used to selectively enable charge pump cores based on power demands that may be associated with a mode of operation and/or a command.