Charge Pump Circuit Latch Clock Signal Ripple Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional charge pump circuits in non-volatile memory apparatuses generate unnecessary ripples and peak currents due to uncontrolled clock signals during voltage pumping operations, leading to reduced output voltage performance.
Innovation Solution
A charge pump circuit comprising delay units, a latch circuit, and charge pump units, where the latch circuit controls the final stage clock signal to prevent unnecessary clock pulses, allowing for smooth voltage level maintenance and reduced ripple and peak current by latching the clock signal when the voltage pumping operation is complete.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional charge pump circuit continues clock signals after voltage pumping operation is finished, then the charge pump units can operate continuously, but unnecessary clock pulses are transmitted generating output voltage ripple and peak current
Solution Approach 1:
The latch circuit is configured to latch the final stage clock signal when the voltage pumping operation is completed, preemptively preventing unnecessary clock pulses from being transmitted to subsequent charge pump units. This preliminary action stops the clock signal propagation before harmful ripples and peak currents can be generated, while maintaining continuous operation capability through controlled clock signal termination.
2Object-generated harmful factors
If conventional charge pump circuit stops clock signals immediately after voltage pumping operation, then output voltage ripple is reduced, but delay time is required for re-generating output voltage causing another ripple
Solution Approach 1:
The latch circuit maintains the latched state of the final stage clock signal, keeping the clock signal path ready for immediate restart without requiring delay time for re-generation. When restart is needed, the latched clock signal can be quickly re-enabled, eliminating the restart delay and preventing output voltage ripple while maintaining continuous operation capability.
3Power
If conventional charge pump circuit uses multiple charge pump units operating in sequence, then higher output voltage can be generated, but unnecessary clock pulses propagate through all units generating more ripple
Solution Approach 1:
The latch circuit extracts and removes the harmful propagation of clock pulses from the system by latching the final stage clock signal when operation is completed. This prevents unnecessary clock pulses from propagating through the chain of charge pump units, eliminating peak current generation while preserving the multi-unit configuration needed for high output voltage generation.
Data Source
AI summary
The invention provides a memory apparatus, a charge pump circuit, and a voltage pumping method thereof. The charge pump circuit including a plurality of delay units, a latch circuit, and a plurality of charge pump units. The delay units respectively generate a plurality clock signals according to an output clock signal. The latch circuit receive a final stage clock signal of the clock signals and a latch enable signal. The latch circuit decides whether to latch final stage clock signal or not to generate the output clock signal according to the latch enable signal. The first stage of the charge pump unit receives an input voltage, and the charge pump units operate a voltage pumping operation on the input voltage to generate an output voltage according to the clock signals and the output clock signal.