Charge Pump Latch Circuit Stabilization for Low Voltage Operation
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Solution Overview
Problem
Charge pump latch circuits face limitations in operating effectively at very low supply voltages, leading to insufficient load current supply and potential stress on thin oxide layers due to asymmetries in biasing voltages during high-frequency switching.
Innovation Solution
The solution involves managing the phases of the stabilisation stage to turn off all pass transistors during phase overlap, using inverted and negated phase signals to prevent potential asymmetries, and employing phase generators to ensure correct biasing of transistors, thereby ensuring efficient turn-on and turn-off of transistors without stressing thin oxide layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If charge pump latch circuits operate at high frequencies to improve productivity, then the operating frequency increases, but asymmetries in biasing voltages occur during high-frequency switching causing stress on thin oxide layers
Solution Approach 1:
The stabilisation stage is activated before the main charge pump stages to pre-establish correct biasing voltages on the gate terminals of pass transistors. This preliminary action ensures that when high-frequency switching occurs, the thin oxide layers are already properly conditioned and not subjected to harmful voltage asymmetries.
Solution Approach 2:
The stabilisation stage acts as an intermediary circuit between the power supply and the main charge pump stages. It generates intermediate biasing voltages that mediate the connection, protecting the thin oxide layers from direct exposure to harmful voltage fluctuations during high-frequency operation.
2Device complexity
If charge pump latch circuits use simple phase control to reduce device complexity, then the circuit structure is simplified, but asymmetries in biasing voltages occur during phase overlap periods
Solution Approach 1:
The phase control is segmented into two independent parts: the main charge pump stages and the stabilisation stage. Each stage receives different phase signals (FX, FN for main stages; FXN, FNN for stabilisation stage), allowing independent optimization of their respective functions while maintaining overall system simplicity.
Solution Approach 2:
The stabilisation stage intentionally uses asymmetric phase control with inverted and negated phase signals that differ from the main charge pump stages. This asymmetric approach specifically addresses the biasing voltage symmetry problem during phase overlap, while the overall circuit structure remains relatively simple.
3Use of energy by moving object
If charge pump latch circuits operate at low supply voltages to improve energy efficiency, then power consumption is reduced, but insufficient load current is supplied
Solution Approach 1:
The stabilisation stage changes the voltage parameters by generating elevated biasing voltages on the gate terminals of pass transistors. This parameter change allows the transistors to operate effectively even when the overall supply voltage is low, thereby maintaining sufficient load current while preserving energy efficiency.
Data Source
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AI summary
The invention relates to a charge pump latch circuit (10) comprising at least one first and one second charge pump stage (CBi-1, CBi) interconnected in an intermediate circuit node (INT) and a stabilization stage (20) connected to the intermediate circuit node (INT) and to control terminals of transistors comprised in the first and second charge pump stages (CBi-1, CBi). Advantageously according to the invention, the stabilisation stage (20) is connected to at least one first and one second pair (CFO1, CFO2) of first and second enable terminals receiving suitable and distinct phase signals able to ensure the turn-off of the stabilisation stage (20) during the overlapping periods of the phase signals.