Cascaded Charge Pump Voltage Amplifier With Parasitic Compensation
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Solution Overview
Problem
Existing voltage amplifiers in electronic devices, particularly in memory systems, face inefficiencies due to the need for multiple capacitors and complex architectures, which increase power consumption and reduce area efficiency, while also being affected by parasitic capacitances that degrade signal linearity.
Innovation Solution
A voltage amplifier system utilizing cascaded charge pump boosting with a differential amplifier and two capacitors, along with a set of switches, to achieve voltage amplification while reducing the number of capacitors needed and compensating for parasitic capacitances, thereby improving area efficiency and signal linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple capacitors and complex architecture are used for voltage amplification, then voltage amplification accuracy is improved, but power consumption increases and area efficiency decreases
Solution Approach 1:
The patent combines multiple capacitor functions into a single capacitor by using switch configurations to dynamically connect different capacitor segments (C1, C2, C3) to the amplification circuit. This merging approach maintains the required capacitance values for accurate voltage amplification while reducing the total number of physical capacitors, thereby decreasing area occupation and parasitic effects that contribute to power consumption.
Solution Approach 2:
The patent employs dynamic switching mechanisms where switches (S1, S2, S3, S4) reconfigure the capacitor connections during different phases of the amplification cycle. This dynamic reconfiguration allows the same capacitor to serve multiple functional roles at different times, eliminating the need for multiple static capacitors and reducing both area and power consumption while maintaining amplification accuracy.
2Measurement precision
If multiple capacitors and complex architecture are used for voltage amplification, then voltage amplification accuracy is improved, but area efficiency decreases
Solution Approach 1:
The patent merges multiple capacitor functions into a single physical capacitor structure with switchable configurations. By using switches to dynamically connect different capacitor segments (C1, C2, C3) to the amplification circuit, the design achieves the required capacitance values for accurate voltage amplification while occupying significantly less silicon area compared to implementing multiple separate capacitors.
Solution Approach 2:
The single capacitor structure in the patent serves multiple functions by being dynamically reconfigured through switches during different operational phases. The same capacitor segments are reused for different amplification stages and compensation functions, making the capacitor structure universal and eliminating the need for dedicated capacitors for each function, thus improving area efficiency.
3Power
If complex architecture with multiple capacitors is used, then voltage amplification capability is improved, but device complexity increases
Solution Approach 1:
The patent uses dynamic switching to reconfigure a single capacitor structure for different amplification stages, replacing the need for multiple static capacitor connections. This dynamic approach simplifies the overall architecture by reducing the number of permanent connections and components while maintaining the ability to achieve high voltage amplification through timed switching sequences.
Solution Approach 2:
The patent employs periodic switching cycles where switches (S1, S2, S3, S4) are activated in specific sequences during different phases of the amplification process. This periodic reconfiguration allows the same hardware components to perform multiple amplification functions at different times, reducing architectural complexity while maintaining high voltage amplification capability.
4Power
If traditional voltage amplifier architecture is used, then voltage amplification is achieved, but parasitic capacitances degrade signal linearity
Solution Approach 1:
The patent extracts and compensates for parasitic capacitances by introducing dedicated compensation capacitors (Cp1, Cp2) and switches that specifically target and counteract the parasitic effects. By separating the compensation function from the main amplification path and using controlled switching, the design removes the detrimental impact of parasitic capacitances on signal linearity while preserving the voltage amplification function.
Solution Approach 2:
The patent implements a feedback mechanism where the effect of parasitic capacitances is measured and compensated by adjusting the compensation capacitor connections through switches. This feedback approach continuously counteracts the parasitic effects during operation, maintaining signal linearity despite the presence of inherent parasitic capacitances in the amplifier components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution achieves accurate voltage amplification with reduced power consumption and improved signal linearity by using a simpler architecture that omits the need for multiple capacitors and adaptively compensates for parasitic capacitances, enhancing area efficiency and signal processing capabilities.
Implementation Method 1
first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage
Implementation Method 2
the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage
Implementation Method 3
second electrical charges are stored at a second capacitor according to the third voltage
Implementation Method 4
the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage
Data Source
AI summary
Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.