Charge Pump Peak Current Control for Stable Memory Voltage

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Solution Overview

Problem

The high peak of current flowing into the input of a charge pump negatively affects the overall operation of memory devices, particularly as integration and operating speed increase.

Innovation Solution

A memory device with a peak control circuit that senses the current flowing into the charge pump and controls it to a threshold level or less, using a control signal to adjust the frequency and magnitude of the clock signal, ensuring stable voltage generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the charge pump operates at high speed to support increased memory operating speed, then productivity is improved, but the peak current becomes excessively high causing harmful effects

Engineering Contradiction:
Improvememory operating speedVSAvoidpeak current
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent applies periodic action by using a clock signal to control the charge pump in periodic cycles. The control circuit adjusts the duty cycle of the clock signal to regulate the average current while maintaining high-speed operation capability. This allows the system to achieve high productivity when needed while limiting peak current through controlled periodic switching rather than continuous operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent implements dynamics by making the charge pump operation adjustable and adaptive. The control circuit dynamically modifies the clock signal parameters (frequency, duty cycle) based on operational requirements. This dynamic control enables the system to optimize between speed and current consumption in real-time, resolving the contradiction between high productivity and peak current limitation.

Inventive Principle:
Principle #15Dynamics

2Power

If the charge pump generates high voltage for memory operations, then power is improved, but the current peak causes instability in memory operation

Engineering Contradiction:
Improvevoltage generation capabilityVSAvoidoperation stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies feedback by incorporating a control circuit that monitors the charge pump operation and adjusts the clock signal accordingly. The control circuit receives feedback about the operational state and modifies the duty cycle or frequency of the clock signal to maintain stable operation. This feedback mechanism ensures that high voltage generation does not cause instability by continuously adjusting parameters based on actual operating conditions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The periodic clock signal controls the charge pump to generate voltage in controlled cycles rather than continuously. By adjusting the duty cycle, the system can achieve the required voltage levels while allowing rest periods that prevent current peaks and maintain operational stability. This periodic operation reconciles high power capability with reliable stable operation.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Stabilizes the memory operation by effectively managing the peak current, supporting efficient voltage generation and reducing adverse effects on the device.

Implementation Method 1

a charge pump configured to generate the voltage

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

sensing a current flowing from a pad, to which an external voltage is applied, to the charge pump and a voltage drop due to a path resistance

Methodology Applied
Scientific EffectVoltage drop measurement: Ohm's Law

Data Source

PatentUS12525302B2Memory device including charge pump, and operation method of the memory device
Publication Date: 2026.01.13 SAMSUNG ELECTRONICS CO LTD
  • US12525302B2 patent drawing
  • US12525302B2 patent drawing
  • US12525302B2 patent drawing

AI summary

A memory device includes a memory cell array including a plurality of memory cells, a control logic configured to control a memory operation with respect to the plurality of memory cells, and a voltage generator configured to output a voltage for the memory operation. The voltage generator includes a charge pump configured to generate the voltage, and a peak control circuit configured to sense a current flowing from a pad, to which an external voltage is applied, to the charge pump, and control a peak of the current to be a threshold level or less based on a result of the sensing.