Charge Pump Frequency Modulator for PLL Phase Error Correction
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Solution Overview
Problem
Existing phase locked loop (PLL) circuits face phase errors due to mismatch between pre-emphasis filters and PLL transfer functions, requiring complex calibration and increased noise levels, especially at high data rates where VCO gain linearity is critical.
Innovation Solution
A hybrid time/digital fractional-N PLL with a programmable charge pump-based direct frequency modulator that uses a passive pseudo-differential circuit topology without an operational amplifier, allowing for linear phase correction and accurate VCO gain calibration, reducing circuit complexity and eliminating the need for digital pre-emphasis filters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a digital pre-emphasis filter is used to correct phase errors, then phase accuracy is improved, but circuit complexity increases due to calibration requirements
Solution Approach 1:
The patent removes the digital pre-emphasis filter and its associated calibration circuits from the system. Instead of using complex filtering to correct phase errors, the invention directly addresses the root cause through passive pseudo-differential circuitry that inherently compensates for phase errors without requiring external calibration components.
Solution Approach 2:
The passive pseudo-differential circuit topology automatically corrects phase errors through its inherent circuit characteristics. The circuit self-regulates phase accuracy through its differential structure and passive components, eliminating the need for external calibration systems or adaptive control mechanisms.
2Productivity
If the modulation signal is boosted to achieve high data rates, then productivity is improved, but noise levels increase due to larger clock feed-through
Solution Approach 1:
The patent replaces active signal boosting mechanisms with a passive pseudo-differential circuit approach. Instead of amplifying the modulation signal and accepting the associated clock feed-through noise, the invention uses passive circuitry that inherently handles high data rates without requiring signal boosting, thus avoiding the noise penalty.
3Ease of operation
If a programmable charge pump is used to modulate the PLL, then ease of operation is improved, but circuit complexity increases
Solution Approach 1:
The patent integrates the modulation function directly into the charge pump circuit itself, combining what would traditionally be separate components (modulator and charge pump) into a unified structure. This integration allows the charge pump to perform both frequency synthesis and modulation functions, reducing overall system complexity while maintaining programmability and ease of operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution achieves high data rates independent of PLL loop bandwidth, reduces phase errors, and simplifies circuit implementation by eliminating the need for complex calibration circuits, while maintaining low noise levels and high modulation fidelity.
Implementation Method 1
a charge pump-based frequency modulator comprises an analog phase correction path comprising a varactor and a charge pump
Implementation Method 2
The varactor is coupled to an output of the charge pump-based frequency modulator
Data Source
AI summary
A charge pump-based frequency modulator is provided. The charge pump-based frequency modulator comprises an analog phase correction path comprising a varactor and a charge pump. The varactor is coupled to an output of the charge pump-based frequency modulator. The charge pump is coupled to a node between the varactor and the output and receives a signal containing the modulated data.