Charge-Pump Phase Interpolator Without Quadrature Inputs
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Solution Overview
Problem
Conventional phase interpolators used in SerDes applications suffer from significant nonlinearity, requiring quadrature input signals and common-mode feedback, which limits their accuracy and efficiency.
Innovation Solution
A high linearity phase interpolator design that eliminates the need for quadrature input signals and common-mode feedback, utilizing digital logic to generate required input and control signals, achieving 11-bit resolution across 200 ps, resulting in a time resolution of approximately 97.6 fs, significantly better than conventional PIs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional phase interpolators are used in SerDes applications, then the device can operate with standard components, but significant nonlinearity occurs limiting accuracy
Solution Approach 1:
The patent changes the operating parameters by using a single-ended input signal instead of quadrature signals, and implements a novel charge pump architecture with differential charging paths. This parameter change transforms the interpolation mechanism to achieve high linearity (11-bit resolution) without requiring the complex quadrature signal generation, directly resolving the nonlinearity issue in conventional PIs
2Ease of operation
If quadrature input signals and common-mode feedback are used, then the phase interpolator can function, but the device complexity increases
Solution Approach 1:
The patent extracts and eliminates the requirement for quadrature input signals and common-mode feedback circuits from the phase interpolator architecture. By using a single-ended input signal and a redesigned charge pump, the complex signal generation and feedback mechanisms are removed, simplifying the overall device while maintaining functionality
Solution Approach 2:
Instead of using the conventional approach of quadrature signals with differential charging, the patent inverts the approach by using a single-ended signal with a novel differential charge pump architecture. This inversion allows the system to achieve the same phase interpolation function with simpler input requirements and reduced circuit complexity
3Measurement precision
If conventional phase interpolators are used, then the circuit can be implemented with standard components, but the time resolution is insufficient
Solution Approach 1:
The patent achieves superior time resolution (97.6 fs) by changing the control mechanism to use 11-bit resolution control signals that directly modulate the charge pump operation. This parameter change in control precision, combined with the differential charging architecture, enables fine-grained phase adjustment that conventional PIs cannot achieve with standard components
Data Source
AI summary
A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.