Charge Pump PLL with Active Loop Filter for Low Flicker Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing phase-locked loop circuits face challenges in achieving low flicker noise and small area size, particularly in integrated circuits, due to high charge pump noise, which affects the accuracy and efficiency of frequency tracking and generation.
Innovation Solution
The implementation of an active loop filter with an adjustable reference voltage source and a charge pump that includes a PMOS transistor operating in an active region for offset current generation, along with a digitally controlled variable resistor for pump-down current adjustment, reduces noise and area requirements, and maintains a constant loop gain across varying conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional charge pump is used in the phase-locked loop circuit, then the circuit can achieve frequency tracking and generation, but the charge pump noise is high which increases flicker noise and affects accuracy
Solution Approach 1:
The patent changes the operating parameters of the charge pump by using a PMOS transistor in the active region instead of saturation region, and implements a digitally controlled variable resistor to adjust the pump-down current. This parameter optimization reduces charge pump noise while maintaining frequency tracking accuracy.
Solution Approach 2:
The patent implements a dynamically adjustable charge pump circuit where the pump-down current can be adjusted in real-time through a digitally controlled variable resistor. This dynamic adjustment allows the circuit to optimize noise performance while maintaining accurate frequency tracking under varying conditions.
2Object-generated harmful factors
If the circuit components are increased to reduce noise, then noise performance improves, but the circuit area increases
Solution Approach 1:
Instead of increasing circuit components, the patent reduces flicker noise by changing the operating parameters - using PMOS in active region and implementing digital control of the variable resistor. This achieves noise reduction through parameter optimization rather than component proliferation, thereby maintaining small circuit area.
Solution Approach 2:
The patent replaces analog noise-filtering mechanisms with digital control of the variable resistor. This substitution achieves noise reduction through digital signal processing and parameter control rather than requiring additional analog filtering components, thus reducing overall circuit area.
3Productivity
If the charge pump current is increased to improve frequency tracking, then tracking speed improves, but the noise and power consumption increase
Solution Approach 1:
The patent implements a dynamically controllable charge pump where the pump-down current can be adjusted based on operating conditions. This allows the circuit to use higher current for faster tracking when needed, while reducing current to minimize noise during normal operation, thus decoupling tracking speed from continuous noise generation.
Solution Approach 2:
The patent optimizes the charge pump current parameters by using PMOS in active region and digital control of the variable resistor. This allows precise control of current magnitude, enabling fast tracking when required while minimizing noise-generating current during steady-state operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in reduced noise, smaller circuit area, and improved frequency tracking by preventing the PLL from entering a 'dead zone' and maintaining constant loop gain, thereby enhancing the overall performance and cost-effectiveness of phase-locked loop circuits in applications like mobile phones and televisions.
Implementation Method 1
a PMOS transistor operating in an active region for offset current generation
Implementation Method 2
a digitally controlled variable resistor for pump-down current adjustment
Data Source
AI summary
A charge pump phase-locked loop circuit includes an active loop filter, an adjustable reference voltage source, and a charge pump. The active loop filter includes an amplifier that has a negative input node, a positive input node, and an output node. The adjustable reference voltage source is coupled to the positive input node to provide an adjustable reference voltage. The charge pump is coupled to the negative input node to provide a current to or draw a current from the active loop filter in response to a signal from a phase detector. The charge pump includes a first current source coupled to a first voltage and a second current source electrically coupled to a second voltage, the second current source including a resistor. The second current source is configured such that a current provided by the second current source depends on a resistance value of the resistor and a difference between the reference voltage and the second voltage.