Charge Pump Voltage Regulator Standby Power Reduction
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Solution Overview
Problem
Existing charge pump voltage regulators exhibit high standby power consumption due to frequent operation and large current consumption in the output terminal during the standby mode.
Innovation Solution
A charge pump voltage regulator design that includes a charge pump circuit, voltage divider circuit, clock oscillator, and logic control unit, where the logic control unit outputs a control level to the clock oscillator based on comparison results from a voltage comparator to manage the drive clock signal, reversing comparison results when the voltage is outside set limits and maintaining a stable state within those limits to reduce unnecessary operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the charge pump voltage regulator operates in standby mode with frequent switching, then the output voltage regulation is maintained, but the standby power consumption increases due to large current in the output terminal
Solution Approach 1:
The patent implements periodic action by controlling the charge pump circuit to operate in intermittent switching mode during standby state. The control circuit monitors the output voltage and only activates the charge pump when voltage drops below a threshold, rather than maintaining continuous operation. This periodic switching reduces the average current consumption in the output terminal while still maintaining voltage regulation within acceptable ranges during standby mode.
2Reliability
If the resistor voltage divider circuit continuously divides the output signal, then the voltage feedback is maintained, but the current consumption in the output terminal increases during standby mode
Solution Approach 1:
The patent applies dynamics by making the voltage divider circuit configurable between different operating states. During standby mode, the voltage divider circuit can be switched to a high-impedance state or disconnected from the output terminal, eliminating continuous current consumption. When the charge pump needs to operate, the voltage divider is reconnected to provide feedback. This dynamic reconfiguration allows the system to maintain voltage feedback capability only when necessary, significantly reducing standby current.
3Speed
If the charge pump circuit switches frequently to maintain output voltage, then the voltage regulation response is improved, but the power consumption increases due to frequent operation
Solution Approach 1:
The patent implements feedback control with hysteresis to optimize the balance between response speed and power consumption. The control circuit monitors output voltage and uses hysteresis thresholds to determine when to activate or deactivate the charge pump. When voltage drops below a lower threshold, the charge pump activates; when it rises above an upper threshold, the charge pump deactivates. This feedback mechanism with hysteresis prevents excessive frequent switching while maintaining adequate voltage regulation response, reducing unnecessary power consumption during minor voltage fluctuations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces standby power consumption by minimizing frequent operation of the charge pump voltage regulator, maintaining a sleep state when the voltage is within a specified range and ensuring efficient power management by controlling the clock oscillator and switch states.
Implementation Method 1
a first voltage comparator circuit, wherein a first input terminal and a second input terminal of the first voltage comparator circuit respectively input a reference voltage and the divided voltage, and the first voltage comparator circuit is suitable to output at least one of a first comparison result and a second comparison result
Implementation Method 2
a clock oscillator providing a drive clock signal for the charge pump circuit... when the charge pump voltage regulator operates in a standby mode, the logic control unit outputs a first control level to the clock oscillator according to the at least one of the first comparison result and the second comparison result
Implementation Method 3
A charge pump is a type of switched capacitor voltage converter. Its conversion efficiency is high and its peripheral circuits are simple
Implementation Method 4
When the output voltage of the charge pump is higher than the target regulation voltage, the charge pump operates in a standby mode, in which the current consumption is minimal because the charges stored in the output capacitor can provide the load current
Data Source
AI summary
A charge pump voltage regulator is provided. The charge pump voltage regulator includes a charge pump circuit, where an output terminal of the charge pump circuit outputs a stable voltage. The charge pump voltage regulator also includes a voltage divider circuit suitable to divide the stable voltage to output a divided voltage and a clock oscillator providing a drive clock signal for the charge pump circuit. In addition, the charge pump voltage regulator includes a first voltage comparator circuit suitable to output at least one of a first comparison result and a second comparison result. Further, the charge pump voltage regulator includes a logic control unit, where, when the charge pump voltage regulator operates in a standby mode, the logic control unit outputs a first control level to the clock oscillator according to the at least one of the first comparison result and the second comparison result.


