Charge Pump Regulator Circuit for 3D NAND Word Line Voltage

Resolve Bottlenecks,
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Solution Overview

Problem

Traditional charge pump regulators in highly integrated circuits, such as 3D NAND memory, are limited by layout bottlenecks that cause voltage drops, leading to premature deactivation of the charge pump and reduced programming speed due to insufficient voltage delivery to word lines.

Innovation Solution

A charge pump regulator circuit that includes a comparator, AND gate, and oscillator, which dynamically adjusts the reference voltage and maintains the charge pump active until target voltage is reached across both the charge pump and the word line, using a parallel RC circuit and t0 edge detector to ensure sufficient charging time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional charge pump regulation loops are used that only monitor charge pump output voltage, then the regulation circuit is simple, but the word line voltage is insufficient due to layout bottlenecks causing voltage drops

Engineering Contradiction:
Improveword line voltage sufficiencyVSAvoidregulation loop complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a dual feedback mechanism: the traditional feedback monitoring charge pump output voltage, and a new feedback path monitoring word line voltage directly. The regulation loop compares both voltages against target levels and adjusts charge pump operation accordingly, ensuring word line voltage sufficiency while maintaining regulatory control

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary comparison mechanism that evaluates both charge pump output voltage and word line voltage. This intermediary logic determines charge pump operation based on the combined state of both voltage measurements, resolving the conflict between simple regulation and reliable voltage delivery

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the charge pump is deactivated when output voltage reaches target level, then energy consumption is reduced, but programming speed decreases due to insufficient charging time

Engineering Contradiction:
Improveprogramming speedVSAvoidcharge pump energy consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent implements dynamic charge pump operation where the deactivation timing is adjusted based on real-time monitoring of both charge pump output voltage and word line voltage. The charge pump remains active longer than traditional systems when word line voltage lags behind charge pump voltage, optimizing the balance between programming speed and energy consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs preliminary monitoring of word line voltage to determine whether extended charge pump operation is needed before deactivation. By anticipating the voltage delivery delay caused by layout bottlenecks, the system proactively maintains charge pump operation to ensure sufficient programming speed

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10951114B2Apparatuses and methods for charge pump regulation
Publication Date: 2021.03.16 MICRON TECHNOLOGY INC
  • US10951114B2 patent drawing
  • US10951114B2 patent drawing
  • US10951114B2 patent drawing

AI summary

Certain embodiments of the present invention include an apparatus comprising a charge pump, configured to provide an output voltage at an output node of the charge pump, and a charge pump regulator circuit coupled to the charge pump. One such charge pump regulator circuit is configured to control the charge pump to increase the output voltage during a first period of time. Such a charge pump regulator circuit can also cause a node of a circuit coupled to the output node of the charge pump to reach a target voltage level during a second time period.