Charge Pump Circuit Layout for High-Voltage Isolation

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Solution Overview

Problem

There is a need for an electronic device capable of withstanding high voltages between active device regions and a semiconductor layer without increasing the thickness of the insulation layer.

Innovation Solution

The electronic device includes a first doped region of a complementary doping type in a semiconductor layer, an insulation layer adjoining the doped region, and at least two active device regions in a second semiconductor layer, with an electrical connection between one of the active device regions and the doped region, where each active device region is adjacent to the doped region and separated by the insulation layer, allowing for effective voltage blocking without thickening the insulation layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the insulation layer is increased to withstand high voltages, then the voltage blocking capability is improved, but the device dimensions and complexity increase

Engineering Contradiction:
Improvevoltage blocking capabilityVSAvoidinsulation layer thickness
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent applies local quality by creating a specially doped region with different electrical properties than the surrounding semiconductor material. This doped region is positioned adjacent to the insulation layer to provide enhanced voltage blocking capability locally, rather than increasing the insulation layer thickness uniformly across the entire device. The doped region's specific doping concentration and spatial distribution create localized electrical field management that protects the insulation layer from high voltage stress.

Inventive Principle:
Principle #3Local quality

2Length of stationary object

If the insulation layer thickness is kept minimal for compact device dimensions, then the device size is reduced, but the voltage blocking capability deteriorates

Engineering Contradiction:
Improveinsulation layer thicknessVSAvoidvoltage blocking capability
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent introduces a doped region as an intermediary element between the insulation layer and the high voltage active device regions. This doped region acts as a mediator that manages the electrical field distribution, protecting the thin insulation layer from direct exposure to high voltage stress. The intermediary doped region enables the system to achieve high voltage blocking capability without requiring increased insulation layer thickness.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables the electronic device to maintain a high voltage blocking capability while keeping the insulation layer thickness minimal, ensuring efficient operation in electronic circuits.

Implementation Method 1

a first doped region of a first doping type arranged in a first semiconductor layer of a second doping type complementary to the first doping type

Methodology Applied
Scientific Effectpn-junction: Diode

Data Source

PatentUS12176339B2Electronic device and charge pump circuit
Publication Date: 2024.12.24 INFINEON TECHNOLOGIES AG
  • US12176339B2 patent drawing
  • US12176339B2 patent drawing
  • US12176339B2 patent drawing

AI summary

An electronic device is disclosed. The electronic device includes: a first doped region of a first doping type arranged in a first semiconductor layer of a second doping type complementary to the first doping type; an insulation layer formed on top of the first semiconductor layer and adjoining the first doped region; at least two active device regions arranged in a second semiconductor layer formed on top of the insulation layer; and an electrical connection between one of the at least two active device regions and the first doped region. Each of the at least two active device regions is arranged adjacent to the first doped region and separated from the first doped region by the insulation layer.