Charge Pump Circuit With Voltage Multiplier For Low Voltage Operation
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Solution Overview
Problem
Conventional charge pump circuits face limitations in generating high output voltages efficiently, particularly at low supply voltages, as they often result in voltage drops due to threshold voltages across diodes, limiting their effectiveness in modern integrated circuits.
Innovation Solution
The implementation of a charge pump circuit with voltage multiplier circuits that generate two-phase output signals, allowing the NMOS transistor to conduct without threshold voltage drops, and subsequent capacitors connected to voltage doubler circuits to increase charge output, thereby enhancing the output voltage across each stage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional charge pump circuits use diode chains with capacitors to generate output voltage, then voltage multiplication is achieved, but threshold voltage drops across diodes reduce the output voltage efficiency
Solution Approach 1:
The patent changes the operating parameters of the charge pump by using voltage multiplier circuits that generate two-phase output signals with maximum values greater than the supply voltage. This allows the NMOS transistor to conduct without threshold voltage drops, fundamentally changing how the charge pump operates to eliminate the voltage loss mechanism
Solution Approach 2:
The patent replaces the mechanical diode-based voltage multiplication mechanism with an electric field-based approach using voltage multiplier circuits. Instead of relying on diode forward voltage drops, the system uses capacitive coupling and two-phase signaling to achieve voltage multiplication, substituting a more efficient electrical mechanism
2Power
If charge pump circuits operate at low supply voltages to meet modern IC requirements, then power consumption is reduced, but the ability to generate sufficient output voltage is compromised
Solution Approach 1:
The patent introduces dynamic operation to the charge pump circuit by using two-phase output signals that periodically switch between different voltage states. The voltage multiplier circuits dynamically generate signals with maximum values exceeding the supply voltage during specific clock phases, enabling the circuit to overcome the low supply voltage limitation through time-varying operation
Solution Approach 2:
The voltage multiplier circuits perform preliminary action by pre-charging capacitors to voltages greater than the supply voltage during the first clock phase before the NMOS transistor needs to conduct. This preliminary charging ensures that when the transistor switches, it can transfer the full charged voltage without threshold drops, preparing the system in advance to overcome the low supply voltage constraint
3Use of energy by moving object
If voltage multiplier circuits generate two-phase output signals with maximum values greater than supply voltage, then threshold voltage drops are eliminated, but circuit complexity increases
Solution Approach 1:
The voltage multiplier circuits serve multiple functions: they generate two-phase output signals, provide voltage levels greater than the supply voltage, and enable threshold-voltage-drop-free transistor conduction. By making these circuits multi-functional, the patent reduces the need for separate dedicated components for each function, thereby managing complexity while achieving high voltage transfer efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the generation of higher output voltages with reduced voltage drops, improving the efficiency of charge pump circuits in converting low on-chip supply voltages to higher voltages needed by IC components, such as EEPROM or flash memory programming circuits.
Implementation Method 1
a first electrode of a first capacitor coupled between the NMOS transistor and an adjacent diode connected NMOS device, a second electrode of the first capacitor coupled to a voltage doubler circuit
Implementation Method 2
Charge pump circuits are circuits that generate an output voltage larger than the voltage from which they operate
Data Source
AI summary
The present disclosure relates to a charge pump circuit having one or more voltage multiplier circuits that enable generation of an output signal having a higher output voltage. In one embodiment, the charge pump circuit comprises a NMOS transistor having a drain connected to a supply voltage and a source connected to a chain of diode connected NMOS transistors coupled in series. A first voltage multiplier circuit is configured to generate a first two-phase output signal having a maximum voltage value that is twice the supply voltage. The first two-phase output signal is applied to the gate of the NMOS transistor, forming a conductive channel between the drain and the source, thereby allowing the supply voltage to pass through the NMOS transistor without a threshold voltage drop. Therefore, degradation of the charge pump output voltage due to voltage drops of the NMOS transistor is reduced, resulting in larger output voltages.