Charge Pump Voltage Stabilization via Dummy Load Feedback
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Solution Overview
Problem
The miniaturization of semiconductor processes and the resulting decrease in core power supply voltage lead to increased voltage step-up ratios in Charge pump circuits, causing performance degradation and load variation issues in semiconductor memory devices, particularly flash memory, due to the lack of effective voltage stabilization.
Innovation Solution
A semiconductor device comprising a stabilized power supply circuit, a Charge pump circuit, and a Dummy load circuit that compares generated voltages with a reference voltage, controlling the Dummy load circuit to stabilize the internal voltage by adjusting current flow based on comparison results, thereby mitigating load variations and voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the voltage step-up ratio of the Charge pump circuit is increased to compensate for decreased core power supply voltage, then the operating current increases, but the load variation of the output voltage increases causing performance degradation
Solution Approach 1:
The patent implements a feedback mechanism where the output voltage of the charge pump circuit is monitored and fed back to control the operation of the charge pump. When the output voltage reaches a predetermined level, the charge pump is turned off to prevent over-voltage conditions. This feedback control stabilizes the output voltage despite variations in operating current and load conditions, directly resolving the contradiction between maintaining high voltage step-up ratio and ensuring output voltage stability.
2Loss of energy
If the Charge pump circuit operates continuously to maintain stable output voltage, then power consumption increases, but if it stops operating to reduce power consumption, then voltage fluctuations occur due to load changes
Solution Approach 1:
The patent employs periodic action by controlling the charge pump circuit to operate in cycles rather than continuously. The charge pump is activated when the output voltage drops below a threshold and deactivated when it reaches the target voltage level. This periodic operation reduces average power consumption while maintaining output voltage stability through timely intervention, resolving the contradiction between energy efficiency and voltage stability.
3Loss of energy
If the Dummy load circuit is always in the on-state to stabilize internal voltage, then power consumption increases, but if it is in the off-state to reduce power consumption, then internal voltage jumps occur when boosted voltage changes
Solution Approach 1:
The patent applies dynamics by making the dummy load circuit's operating state variable rather than fixed. The dummy load circuit is dynamically controlled to switch between on-state and off-state based on the operational status of the charge pump circuit and the current voltage conditions. This dynamic adjustment allows the system to minimize power consumption while preventing internal voltage jumps only when necessary, resolving the contradiction between energy efficiency and voltage stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses internal voltage fluctuations, enhances the stability of boosted voltages, and improves the operational reliability of semiconductor memory devices by ensuring stable power supply even during changes in load conditions.
Implementation Method 1
a charge pump circuit generates a second voltage using the first voltage
Implementation Method 2
compares the second voltage with a reference voltage, and outputs a comparison result signals
Implementation Method 3
The voltage change of the boosted voltage VPP acts to change the internal voltage VDD by the parasitic capacitance CST of FIG. 14
Data Source
AI summary
A semiconductor device capable of stabilizing an internal voltage is provided. According to one embodiment, the semiconductor device comprises a stabilized power supply circuit for generating a first voltage, a charge pump circuit for generating a second voltage different from the first voltage using the first voltage, the COUT2 including a comparison circuit for comparing the second voltage with a reference voltage, and a dummy load circuit controlled to be turned on or off in response to a comparison result signal COUT2 outputted from the comparison circuit, and the Dummy load circuit receives the comparison result signal COUT2 and is turned on for a predetermined period, whereby at least a part of a current IDD based on the first voltage flows into the dummy load circuit.


