Dual-Mode Charge Sensor Circuitry for Fast, Accurate Read-Out
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Solution Overview
Problem
Existing charge sensor circuitries face challenges in achieving high spatial resolution with high accuracy and speed in read-out of charge signals, with passive sensors providing fast but low accuracy and active sensors offering high accuracy but slow read-out.
Innovation Solution
A charge sensor circuitry that operates in two modes: a first mode for fast read-out with low accuracy and a second mode for slow read-out with high accuracy, utilizing a first transistor for switching and a second transistor for amplification, allowing versatile operation and compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If passive charge sensor circuitry is used, then read-out speed is fast, but signal-to-noise ratio is low and accuracy is reduced
Solution Approach 1:
The charge sensor circuitry dynamically switches between passive mode (for fast read-out) and active mode (for high accuracy) based on the specific sensing requirements. The transistor switch allows the circuit to adapt its operation mode, enabling fast read-out when accuracy requirements are low and high accuracy when read-out speed can be reduced.
Solution Approach 2:
The circuit changes its operational parameters by switching between passive and active configurations. In passive mode, the transistor is configured for fast signal transfer, while in active mode, the transistor and amplifier are configured to enhance signal-to-noise ratio. This parameter change allows optimization of different performance aspects based on needs.
2Measurement precision
If active charge sensor circuitry is used, then signal-to-noise ratio is high and accuracy is improved, but read-out speed is slow
Solution Approach 1:
The system dynamically switches between passive and active modes depending on the application requirements. When high accuracy is needed, the circuit transitions to active mode with the amplifier enabled. When speed is prioritized, it switches to passive mode, thus resolving the speed-accuracy trade-off through dynamic reconfiguration.
Solution Approach 2:
The sensing operation is segmented into different modes: passive mode for rapid scanning and active mode for detailed measurement. This segmentation allows the system to perform fast initial read-out and then switch to high-accuracy mode only when necessary, optimizing both speed and accuracy at different stages.
3Device complexity
If the number of transistors is reduced for compact design, then device complexity is reduced, but functionality may be limited
Solution Approach 1:
The transistor in the charge sensor circuitry is designed to serve multiple functions: it acts as a switch between passive and active modes, controls signal transfer, and enables the amplifier functionality. This multi-functionality reduces the total number of transistors needed while maintaining both fast read-out and high accuracy capabilities.
Solution Approach 2:
The circuit merges the passive sensor functionality and active amplifier functionality into a single integrated structure sharing common components. The transistor serves dual purposes as both a switching element and a signal control element, combining multiple functions into one component to reduce overall device complexity.
Data Source
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AI summary
A charge sensor circuitry (110; 210; 310; 410) comprises: a detector element (112; 212; 312; 412) configured to generate a charge signal at an internal node (114; 214; 314; 414); wherein the charge sensor circuitry comprises a first transistor (118; 218; 318; 418) comprising a gate (122; 222; 322; 422) for receiving a first control signal and at least one second transistor (124, 126; 224, 226; 324; 424) comprising a first gate (128; 228; 328; 428) connected to the internal node and a second gate (130; 230; 330; 430) for receiving a second control signal; wherein the charge sensor circuitry is configured to, in a first mode, output a first output signal through the first transistor; wherein the charge sensor circuitry is configured to, in a second mode, reset the internal node through the first transistor and output a second output signal through the at least one second transistor.