Charge-Switched Matrix for Reconfigurable Analog MAC Routing
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Solution Overview
Problem
Current analog implementations of machine learning face challenges such as limited programmability of switch matrix connectivity, bandwidth limitations, dependence on physical connections and environmental factors, and the need for significant tuning and special devices.
Innovation Solution
The development of a switched charge circuit that uses input and output charge storage devices, a comparison device, and current sources to achieve rapid reconnection of communications paths and eliminate dependencies on physical connections and environmental factors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed impedance multiplexers and cross-bars are used for switch matrix connectivity, then device impedance is fixed and stable, but programmability is limited and device impedance interferes with modulation results causing distortion
Solution Approach 1:
The patent replaces traditional mechanical/electrical switch matrices with fixed impedance multiplexers and cross-bars with a neuromorphic system using artificial neurons that communicate via charge packets. The switch matrix functionality is substituted by dynamic routing of charge packets through the network based on learned weights, eliminating the need for fixed impedance physical switches while achieving both stability and programmability through the neuromorphic architecture.
Solution Approach 2:
The patent changes the fundamental parameter from fixed impedance to dynamic charge-based weighting. Instead of using fixed impedance multiplexers where impedance determines connectivity, the system uses variable charge packet sizes and routing decisions to dynamically program the switch matrix connectivity. The weights are represented by the number and size of charge packets rather than fixed electrical impedance values.
2Ease of manufacture
If translinear loops are used for analog multiplication, then multiplication function is achieved, but significant setup time is required and dynamic gating is not possible wasting power
Solution Approach 1:
The patent substitutes the translinear loop analog multiplication mechanism with a neuromorphic multiplication approach using charge packet accumulation. Instead of relying on transistor loop dynamics that require setup time to reach equilibrium, the system directly accumulates charge packets representing weighted inputs during the integration phase, achieving multiplication through charge summation rather than analog voltage multiplication. This eliminates setup time and enables immediate dynamic gating.
3Adaptability or versatility
If switched capacitor circuits are used for weight implementation, then weight values can be programmed, but unit capacitors require significant silicon area and are difficult to match limiting resolution
Solution Approach 1:
The patent replaces the switched capacitor circuit implementation with a neuromorphic approach using charge packet representation. Instead of physically switching large unit capacitors to implement weights, the system uses the number, size, and routing of charge packets to represent weight values. This substitution dramatically reduces the silicon area required while maintaining full weight programmability and improving matching through the inherent precision of charge-based representation.
4Productivity
If current summing is used for weighted addition, then multiple input paths can be summed, but bandwidth is limited by finite loop bandwidths
Solution Approach 1:
The patent substitutes current summing through finite bandwidth loops with charge packet accumulation in the neuromorphic network. Charge packets representing weighted inputs are directly accumulated at integration nodes without passing through bandwidth-limited current summing circuits. This charge-based approach eliminates the finite loop bandwidth limitation and enables higher speed operation while maintaining the ability to sum multiple input paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables rapid reconnection of communications paths, avoids bandwidth limitations, and reduces the need for tuning and special devices, thereby enhancing the efficiency and flexibility of analog machine learning systems.
Implementation Method 1
At least one first current source is coupled to the at least one output charge storage device. At least one second current source is coupled to the shared node connecting the at least one input charge storage device and the at least one output charge storage device proportional in magnitude to the at least one first current source to produce a one of a charge multiplication or division on the at least one output charge storage device.
Implementation Method 2
A comparison device is coupled to a shared node connecting the at least one input charge storage device and the at least one output charge storage device. The at least one first current source and the at least one second current source are turned on at the beginning of a second phase and turned off when the shared node reaches one of a potential or charge threshold producing an output pulse proportional to a magnitude of the one of charge multiplication or division.
Data Source
AI summary
A reconfigurable, for example with time, network switch matrix coupling switch charge circuits representing multiply and add circuits (MACs) and neurons (MACs with activations) capable of accepting and outputting proportional to charge pulses through crossbars within said network, said crossbars controlled by local controllers and higher level controllers to setup said crossbar communications.