Charge Transfer Switch Circuit for DRAM Body Bias Control
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Solution Overview
Problem
Conventional boosted voltage generating circuits in DRAMs face inefficiencies due to reduced external supply voltage, leading to decreased operating speed of sense amplifiers and increased back bias voltage effects on NMOS transistors, which hinder charge transfer efficiency.
Innovation Solution
A charge transfer switch circuit is introduced that selectively controls the body bias voltage of transistors, utilizing a circuit design with level shifters, inverters, and capacitors to generate and manage boosted voltages, preventing charge backflow and enhancing transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the external supply voltage is lowered to reduce power consumption, then power consumption is reduced, but the operating speed of the sense amplifier is reduced and charge transfer efficiency deteriorates
Solution Approach 1:
The patent changes the body bias voltage parameter of the NMOS transistor dynamically. During precharge operations, the body bias voltage is raised to increase the threshold voltage and prevent charge backflow. During charge transfer operations, the body bias voltage is lowered to reduce the threshold voltage and improve charge transfer efficiency. This parameter change allows the circuit to maintain high performance while operating at low supply voltages.
2Reliability
If the body bias voltage is increased to prevent charge backflow during precharging, then charge backflow is prevented, but charge transfer efficiency is reduced due to increased threshold voltage
Solution Approach 1:
The patent makes the body bias voltage dynamic rather than static. The body bias voltage is adjusted according to the operational phase: during precharge operations, high body bias voltage is applied to prevent charge backflow; during charge transfer operations, low body bias voltage is applied to maximize charge transfer efficiency. This dynamic adjustment resolves the contradiction between reliability and productivity.
Solution Approach 2:
The patent applies high body bias voltage in advance during precharge operations to establish proper charge distribution before charge transfer operations begin. This preliminary action prevents charge backflow that would otherwise occur during subsequent write operations, ensuring reliable operation without compromising charge transfer efficiency.
3Reliability
If the threshold voltage of NMOS transistors is increased to prevent charge backflow, then charge backflow is prevented, but charge transfer speed is reduced
Solution Approach 1:
The patent dynamically adjusts the threshold voltage of NMOS transistors by controlling the body bias voltage. During precharge operations, the threshold voltage is increased to prevent charge backflow. During charge transfer operations, the threshold voltage is reduced to maximize charge transfer speed. This dynamic control allows the system to achieve both reliability and high speed.
4Power
If conventional pumping circuits are used to generate boosted voltage, then boosted voltage is generated, but charge transfer efficiency is reduced due to body bias effect on NMOS transistors
Solution Approach 1:
The patent introduces body bias voltage control as an additional parameter to the conventional pumping circuit. By independently controlling the body bias voltage of NMOS transistors used as charge transfer switches, the patent optimizes charge transfer efficiency without affecting the boosted voltage generation function. The body bias voltage is adjusted based on operational requirements to maximize productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution increases charge transfer efficiency and prevents charge backflow during precharging, ensuring higher operational speeds and reduced threshold voltage effects on NMOS transistors, thereby improving overall circuit performance.
Implementation Method 1
a capacitor C122 connected between a second node and a third node
Implementation Method 2
selectively controlling a body bias voltage of a charge transfer device... preventing charge backflow and enhancing transfer efficiency
Data Source
AI summary
Provided are a charge transfer switch circuit for selectively controlling body bias voltage of a charge transfer device, and a boosted voltage generating circuit having the same. The charge transfer switch circuit may include a capacitor whose voltage is boosted based on first and second control signals, a first transistor connected between a supply voltage and the capacitor and having a gate receiving a precharge signal, a second transistor connected between a first node and a second node and having a gate connected to a terminal of the capacitor, a third transistor connected between the first node and a bulk voltage of the second transistor and having a gate receiving the first control signal, and a fourth transistor connected between the bulk voltage of the second transistor and a ground voltage and having a gate receiving the second control signal.