Charge-Trap Memory Cell Isolation Patterns

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Solution Overview

Problem

Charge-trap flash memory devices face issues with lateral charge spread in silicon nitride films, degrading retention characteristics, due to increased aspect ratios and interference between floating gate electrodes in highly integrated flash memory devices.

Innovation Solution

The implementation of device isolation patterns on a semiconductor substrate, with charge trap films, blocking dielectric films, and cell electrodes, along with tunnel insulation films, to electrically isolate memory cell patterns and prevent lateral charge spread, using materials like silicon nitride, aluminum oxide, and tantalum nitride, and configuring the memory cell patterns to be wider than the cell active regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If floating-gate flash memory devices are highly integrated, then storage capacity increases, but lateral charge spread in silicon nitride films degrades retention characteristics

Engineering Contradiction:
Improvestorage capacityVSAvoidretention characteristics
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the continuous silicon nitride charge trap film into separate, isolated segments using device isolation patterns and blocking dielectric films. Each memory cell's charge trap film is physically separated from adjacent cells, preventing lateral charge spread while maintaining high integration density for increased storage capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces device isolation patterns and blocking dielectric films as intermediary structures between adjacent charge trap films. These intermediary elements act as barriers that block lateral charge migration, thereby improving retention characteristics without compromising the high integration required for storage capacity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If charge trap films are used instead of floating gate electrodes, then device structure simplifies, but lateral charge spread occurs in silicon nitride films

Engineering Contradiction:
Improvedevice structureVSAvoidcharge retention
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the charge trap film into isolated regions for each memory cell using device isolation patterns. This segmentation maintains the simplified charge-trap structure while preventing the lateral charge spread that would otherwise occur in continuous silicon nitride films

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different properties to different regions: the charge trap film maintains its continuous nature within each memory cell for simple structure, while device isolation patterns and blocking dielectric films create localized barriers at cell boundaries to prevent lateral charge spread, achieving both simplicity and reliability

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the likelihood of charge lateral spread, enhancing the retention characteristics and stability of charge-trap flash memory devices by isolating memory cells and minimizing etch damage during fabrication.

Implementation Method 1

a tunnel insulation film between the memory cell pattern and the cell active region

Methodology Applied
Scientific EffectQuantum tunneling:

Implementation Method 2

a blocking dielectric film on the charge trap film

Methodology Applied
Scientific EffectDielectric blocking: Dielectric

Data Source

PatentUS7772639B2Charge-trap nonvolatile memory devices
Publication Date: 2010.08.10 SAMSUNG ELECTRONICS CO LTD
  • US7772639B2 patent drawing
  • US7772639B2 patent drawing
  • US7772639B2 patent drawing

AI summary

Nonvolatile memory devices including device isolation patterns on a semiconductor substrate are provided. The device isolation patterns define a cell active region and a peripheral active region of the semiconductor substrate. Cell gate electrodes are provided that cross over the cell active regions. Memory cell patterns are provided between the cell gate electrodes and the cell active regions and extend toward the device isolation patterns. A tunnel insulation film is provided between the memory cell pattern and the cell active region. Related methods of fabricating nonvolatile memory devices are also provided herein.