Charge-Trap Support Substrate for Low-Parasitic RF Passive Components
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Solution Overview
Problem
The existing support substrates for passive electronic components, such as capacitors, suffer from deterioration in Q characteristics due to parasitic capacitance, especially in the high-frequency range, caused by insufficient charge trap sites and thermal changes in the polycrystalline silicon layer.
Innovation Solution
A support substrate with a semiconductor substrate, a charge trap layer having a higher crystal defect density, and an insulating layer composed of silicon nitride, where the atomic concentration ratio of N to Si and N is not greater than 45 atom %, and optionally a two-layer insulating structure with opposite fixed charge polarities, is used to reduce mobile charge production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a polycrystalline silicon layer is used as the charge trap layer, then the device can be manufactured with standard processes, but the Q characteristics deteriorate due to parasitic capacitance from insufficient charge trap sites and thermal changes
Solution Approach 1:
The patent changes the material composition parameters of the insulating layer, specifically controlling the oxygen content to 30-70 atom % and using silicon nitride or silicon oxynitride, to reduce fixed charge and improve charge trap layer performance without sacrificing manufacturability
Solution Approach 2:
The patent uses composite material structures including a semiconductor substrate with a charge trap layer and a specifically designed insulating layer (silicon nitride or silicon oxynitride with controlled oxygen content), creating a composite system that achieves both manufacturability and high Q characteristics
2Ease of manufacture
If the insulating layer is composed of SiO2, then the fabrication process is simple, but the large amount of positive fixed charge produces many electrons in the charge trap layer, increasing parasitic capacitance
Solution Approach 1:
The patent changes the insulating layer composition from SiO2 to silicon nitride or silicon oxynitride with controlled oxygen content (30-70 atom %), which fundamentally alters the fixed charge characteristics and reduces electron generation in the charge trap layer
Solution Approach 2:
The patent converts the potential harm of fixed charge in the insulating layer by using materials and compositions that minimize fixed charge, thereby reducing parasitic capacitance while maintaining the insulating layer's primary function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the resistivity of the charge trap layer, reduces parasitic capacitance, relaxes performance requirements, and allows for the use of higher temperature and longer heat-resistant materials, thereby minimizing the impact of thermal changes and improving Q characteristics.
Implementation Method 1
a charge trap layer on the semiconductor substrate and having a higher crystal defect density than the semiconductor substrate
Implementation Method 2
an insulating layer on the charge trap layer... an atomic concentration ratio of N to a total amount of Si and N in the insulating layer is not greater than 45 atom %
Data Source
AI summary
A support substrate for a passive electronic component, the support substrate including: a semiconductor substrate; a charge trap layer on the semiconductor substrate and having a higher crystal defect density than the semiconductor substrate; and an insulating layer on the charge trap layer. In a first aspect, the insulating layer is composed of silicon nitride, and an atomic concentration ratio of N to a total amount of Si and N in the insulating layer is not greater than 45 atom %. In a second aspect, the insulating layer includes a first insulating layer on the charge trap layer; and a second insulating layer on the first insulating layer, wherein a first fixed charge within the first insulating layer and a second fixed charge within the second insulating layer have opposite polarities, and the first insulating layer has a thickness of not less than 0.5 nm and not greater than 3 nm.


