Charge-Trapping Memory Programming with Negative Voltage

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Solution Overview

Problem

Charge-trapping memory devices experience short-term charge loss due to fast de-trapping from shallow traps in the ONO layers, leading to inaccurate data read-back and widened threshold voltage distributions, which complicates the storage of multiple data states.

Innovation Solution

The implementation of a two-stage programming approach, where memory cells are first programmed to threshold voltages below final verify levels in a rough programming phase, followed by applying negative voltages to accelerate charge loss from shallow traps, and then finalized to threshold voltages above verify levels, reducing charge loss and minimizing voltage swing during the final programming phase.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are programmed directly to final verify levels, then programming speed is improved, but short-term charge loss increases due to fast de-trapping from shallow traps

Engineering Contradiction:
Improveprogramming speedVSAvoidcharge retention accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The programming operation is divided into two distinct phases: a rough programming phase that programs cells to intermediate threshold voltages below final verify levels, and a final programming phase that completes the programming to target threshold voltages. This segmentation allows the system to avoid the peak charge loss period while still achieving accurate final states, thereby maintaining programming speed without sacrificing charge retention accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The rough programming phase performs a preliminary programming action to intermediate threshold voltages before the final programming phase. By pre-positioning the threshold voltages below final verify levels and allowing charge loss to occur during this intermediate state, the system prepares the memory cells in a controlled manner that minimizes subsequent charge loss during final programming, thus improving both speed and reliability.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If memory cells are programmed to high threshold voltages, then more data states can be stored, but threshold voltage distribution widens due to charge loss

Engineering Contradiction:
Improvenumber of data statesVSAvoidthreshold voltage distribution width
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

Programming to high threshold voltages is segmented into rough programming to intermediate levels followed by final programming to target levels. This segmentation ensures that cells approach their final high threshold voltage states through a controlled process that minimizes charge loss, thereby maintaining narrow threshold voltage distributions even when storing multiple data states.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically changes the target threshold voltage parameter during the programming process. During rough programming, cells are programmed to intermediate threshold voltages below final verify levels. During final programming, the target parameter is updated to the final verify levels, allowing cells to be programmed to high threshold voltages with minimized charge loss and narrow distributions.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If negative voltage is applied to accelerate charge loss, then short-term charge loss is reduced, but additional programming time is required

Engineering Contradiction:
Improvecharge loss reductionVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The rough programming phase performs a preliminary programming action to intermediate threshold voltages, allowing charge loss to occur naturally during this phase. This preliminary action positions cells in a state where subsequent final programming requires minimal additional charge loss correction, thereby reducing the need for extended negative voltage application and minimizing additional programming time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system converts the potentially harmful effect of charge loss into a beneficial process by intentionally allowing charge loss to occur during the rough programming phase to intermediate threshold voltages. This controlled charge loss phenomenon is then compensated for during the final programming phase, transforming what would be an error into a predictable, manageable process that actually improves final charge retention.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method significantly reduces short-term charge loss, allowing for accurate data retention and narrower threshold voltage distributions, enabling reliable storage of multiple data states in memory cells.

Implementation Method 1

the control gate voltage Vcg is used to adjust an energy band alignment between the channel and the charge-trapping layer

Methodology Applied
Scientific EffectEnergy band alignment: Electric Field

Implementation Method 2

electrons can be injected from the channel into the charge-trapping layer

Methodology Applied
Scientific EffectElectron tunneling: Electric Field

Data Source

PatentUS9437305B2Programming memory with reduced short-term charge loss
Publication Date: 2016.09.06 SANDISK TECHNOLOGIES LLC
  • US9437305B2 patent drawing
  • US9437305B2 patent drawing
  • US9437305B2 patent drawing

AI summary

Techniques are provided for reducing the effects of short-term charge loss while programming charge-trapping memory cells. Short-term charge loss can result in a downshift and widening of a threshold voltage distribution. A programming operation includes a rough programming pass in which memory cells are programmed close to a final threshold voltage distribution, for each target data state. Subsequently, a negative voltage is applied to control gates of the memory cells. Subsequently, a final programming pass is performed in which the memory cells are programmed to the final threshold voltage distribution. Since the negative voltage accelerates charge loss, there is reduced charge loss after the final programming pass. The rough programming pass can use incremental step pulse programming for the lowest target data state to obtain information regarding programming speed. An initial program voltage in the final programming pass can be set based on the programming speed.