Two-Stage Programming Reduces Neighbor Effect in Charge-Trapping Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional two-sided charge-trapping memory cells experience a 'neighbor effect' where the programmed state of one charge-trapping site affects the threshold voltage of the neighboring site, leading to increased neighbor effect and reduced read windows, especially when one site is programmed to the highest threshold level.
Innovation Solution
A two-stage programming method is employed, where the first programming scheme sets the threshold voltage for one charge-trapping site to a lower level and the second scheme sets the threshold voltage for the other site to a higher level, using different biasing arrangements to minimize the neighbor effect by reducing charge transfer in the second scheme.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If one charge-trapping site is programmed to the highest threshold level, then the storage capacity and data density are improved, but the neighbor effect increases and read window decreases
Solution Approach 1:
The patent applies preliminary programming to set one charge-trapping site to the highest threshold level (L3) before programming the other site. This preliminary action establishes the high storage capacity state while the subsequent programming of the second site is carefully controlled to minimize disturbance to the first site, thereby maintaining both high storage capacity and acceptable read window
Solution Approach 2:
The patent changes programming parameters such as voltage levels and pulse durations between the first and second programming schemes. By adjusting these parameters, the patent minimizes the neighbor effect when programming the second site while maintaining the highest threshold level in the first site, thus preserving both storage capacity and read window
2Reliability
If a two-stage programming method is used with different biasing arrangements, then the neighbor effect is reduced and read window is improved, but the programming complexity increases
Solution Approach 1:
The patent segments the programming process into two distinct programming schemes with different biasing arrangements. The first scheme programs one site to L3 while the second scheme programs the other site with modified parameters. This segmentation allows optimization of each stage to minimize neighbor effect, improving read window despite increased programming steps
Solution Approach 2:
The patent changes key programming parameters between the two schemes, such as applying different word line and bit line voltages, and different pulse durations. These parameter changes are strategically designed to reduce charge transfer to neighboring sites, thereby reducing the neighbor effect and improving read window while maintaining manageable programming complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the neighbor effect, allowing for narrower threshold voltage distributions and wider read windows, improving the programming efficiency and accuracy of two-sided charge-trapping memory devices.
Implementation Method 1
Another type of memory uses a charge-trapping structure, such as a layer of non-conductive SiN material, rather than the conductive gate material used in floating gate devices. When a charge-trapping cell is programmed, the charge is trapped and does not move through the non-conductive layer.
Implementation Method 2
The cell is programmed by biasing the terminals of the device so as to transfer or remove charge from the charge-trapping sites 108, 110.
Implementation Method 3
The stored charge changes the threshold voltage (Vth) of the memory cell. In a READ operation, a read voltage is applied to the gate of the memory cell, and whether or not the memory cell turns on (e.g. conducts current) indicates the programming state of the memory cell.
Data Source
AI summary
A method for operating a charge-trapping multi-level cell (“MLC”) memory array comprises programming a first plurality of charge-trapping sites to a preliminary first-level value, programming a second plurality of charge-trapping sites to a preliminary second-level value, and programming a third plurality of charge-trapping sites to a final third-level value using a first programming scheme. Then, the first plurality of charge-trapping sites is programmed to a final first-level value and the second plurality of charge-trapping sites is programmed to a final second-level value using a second programming scheme.