Charge Trapping Memory Programming Window Expansion

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Solution Overview

Problem

Programming charge trapping memory cells is complicated by undesirable effects such as program disturbance and the second bit effect, which impair the ability to determine the program state and reduce the programming window in charge trapping memory devices.

Innovation Solution

A two-stage method of programming a virtual ground array of charge trapping memory cells, where the first data region is programmed and the second data region is erased when not instructed to be programmed, and vice versa, using specific voltage applications to mitigate the second bit effect and program disturbance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional programming methods are used for charge trapping memory cells, then programming can be performed, but program disturbance and second bit effect reduce the programming window and impair program state determination

Engineering Contradiction:

Improveprogram state determination abilityVSAvoidprogram disturbance and second bit effect

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the programming operation into two distinct stages: a first programming stage that programs the first data region, and a second programming stage that programs the second data region while erasing the first data region. This segmentation allows each stage to be optimized independently, preventing program disturbance and second bit effect from compromising program state determination reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs an erase operation on the first data region before programming it in the second stage. This preliminary action ensures that residual charges from the first programming stage are removed, eliminating program disturbance and second bit effect that would otherwise impair the reliability of program state determination.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If conventional programming methods are used, then programming can be performed, but the programming window is reduced due to program disturbance and second bit effect

Engineering Contradiction:

Improveprogramming windowVSAvoidprogram disturbance and second bit effect

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

By dividing programming into two stages with distinct voltage applications, the patent eliminates interference between data regions. The first stage programs the first data region with appropriate voltages, while the second stage programs the second data region and simultaneously erases the first data region, preventing charge interference that reduces the programming window.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The erase operation performed in the second programming stage on the first data region removes residual charges before they can cause program disturbance or second bit effect. This preliminary cleanup action restores the full programming window by eliminating harmful interactions between programmed and unprogrammed cells.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If a two-stage programming method is implemented to mitigate program disturbance and second bit effect, then program state determination ability improves, but device complexity increases

Engineering Contradiction:

Improveprogram state determination abilityVSAvoidprogramming method complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the programming of the second data region with the erasing of the first data region in a single second programming stage. By applying specific voltage combinations simultaneously to different terminals, the method achieves both operations in parallel, reducing the overall complexity compared to performing separate erase and program operations.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The programming circuitry is designed to perform multiple functions: it can program either data region independently, erase either data region, or perform both operations simultaneously in the second stage. This multi-functionality reduces the need for separate dedicated circuits for each operation, thereby managing device complexity while improving reliability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves the ability to determine program states and increases the programming window by minimizing the second bit effect and program disturbance, enhancing the operational efficiency of charge trapping memory devices.

Implementation Method 1

charge trapping memory cells... charge can be stored in two regions of a nitride layer that forms part of a typical charge trapping memory cell

Methodology Applied

Scientific EffectCharge trapping:

Implementation Method 2

Programming a charge trapping memory device may be complicated by several undesirable effects... program disturbance and a second bit effect

Methodology Applied

Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS7898873B2Window enlargement by selective erase of non-volatile memory cells

Publication Date: 2011.03.01 MACRONIX INTERNATIONAL CO LTD

AI summary

A method is described for enlarging a programming window of charge trapping memory cells in a virtual ground charge trapping memory EEPROM array. The method substantially eliminates second bit effects and program disturbances to nearby charge trapping memory cells.