Charge-Trapping Structure Suppresses Gate Disturbance in EEPROM

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Solution Overview

Problem

In semiconductor devices with single-poly EEPROM structures, gate disturbance occurs due to excess hot electrons being trapped in adjacent floating gate electrodes, leading to increased threshold voltages and undesired programming of non-selected cells.

Innovation Solution

A charge-trapping structure is implemented to trap excess hot electrons from a selected cell, preventing them from affecting adjacent non-selected cells by draining these electrons through a charge-trapping well and pattern, thereby maintaining the threshold voltage of non-selected cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hot electrons are injected into the selected cell through the gate oxide layer to program the cell, then the selected cell is successfully programmed, but hot electrons are excessively generated and moved into adjacent cells causing gate disturbance

Engineering Contradiction:
Improveprogramming accuracyVSAvoidgate disturbance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A charge trapping layer is introduced as an intermediary between the floating gate electrode and the substrate. This layer selectively traps excess hot electrons generated during programming of the selected cell, preventing them from migrating to adjacent cells. The charge trapping layer acts as a mediator that captures harmful electrons while allowing the programming function to proceed normally in the selected cell.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful hot electrons that would otherwise cause gate disturbance in adjacent cells are converted into a beneficial effect by having them trapped in the charge trapping layer. Instead of allowing these electrons to migrate and increase threshold voltages of non-selected cells, the charge trapping layer captures them, and their trapped charge state can be used to indicate the programming status or to prevent false programming of adjacent cells.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Manufacturing precision

If the threshold voltage of adjacent cells is increased due to trapped hot electrons, then gate disturbance occurs and undesired cells are programmed, but the programming of the selected cell is compromised

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidcell selection accuracy
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The charge trapping layer serves as a mediator that prevents the direct interaction between hot electrons from the selected cell and the floating gate of adjacent cells. By positioning this layer strategically, it intercepts electrons before they can increase the threshold voltage of non-selected cells, thereby maintaining precise threshold voltage control in adjacent cells while allowing successful programming of the selected cell.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate structure is segmented into multiple functional layers: the floating gate electrode for charge storage, the charge trapping layer for electron capture, and the substrate. This segmentation allows different regions to perform specialized functions - the floating gate maintains the programmed state of the selected cell while the charge trapping layer independently manages excess electrons to prevent interference with adjacent cells.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively suppresses gate disturbance, ensuring that only the selected cell is programmed without influencing adjacent cells, improving operational characteristics and reliability of the semiconductor device.

Implementation Method 1

hot electrons are injected into the cell through a gate oxide layer to charge charges in the floating gate electrode

Methodology Applied
Scientific EffectHot electron injection: Electron Avalanche

Implementation Method 2

A charge-trapping structure is implemented to trap excess hot electrons from a selected cell

Methodology Applied
Scientific EffectCharge trapping: Electrostatic Induction

Data Source

PatentUS7525847B2Semiconductor device and methods of manufacturing the same
Publication Date: 2009.04.28 SAMSUNG ELECTRONICS CO LTD
  • US7525847B2 patent drawing
  • US7525847B2 patent drawing
  • US7525847B2 patent drawing

AI summary

A semiconductor device includes at least two transistors and a charge-trapping structure. The charge-trapping structure traps charges, which are moved from a selected transistor toward a non-selected transistor, adjacent to the selected transistor among the transistors, thereby preventing a threshold voltage of the non-selected transistor from being increased. Thus, the charge-trapping structure traps the charges so that an increase of the threshold voltage of the non-selected voltage is suppressed.