Charged Particle Beam Lithography Mask Correction
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Solution Overview
Problem
Conventional charged particle beam lithography systems face challenges in accurately transferring patterns with features smaller than 100 nm, as existing methods like inverse lithography technology (ILT) and optical proximity correction (OPC) struggle to predict wafer critical dimension (CD) sensitivity to changes in resist exposure, leading to increased CD variation and line edge roughness.
Innovation Solution
A method is introduced to calculate the sensitivity of mask and wafer patterns to changes in resist exposure using charged particle beam simulation and lithography simulation, allowing for the modification of pattern exposure information to increase edge slope and reduce CD variation by generating overlapping shots, particularly around the perimeter of patterns, to improve CD uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional optical lithography is used to fabricate semiconductor devices, then the manufacturing process is simple and well-established, but the ability to accurately transfer patterns with features smaller than 100 nm is limited
Solution Approach 1:
The patent changes the fundamental parameter of lithography from optical methods to charged particle beam methods. This transition enables sub-100 nm pattern transfer accuracy by utilizing the shorter de Broglie wavelength of charged particles compared to optical wavelengths, directly resolving the limitation of conventional optical lithography while accepting increased system complexity
Solution Approach 2:
The patent replaces the optical system (using light waves) with a charged particle beam system (using electron or ion beams). This substitution of the physical mechanism enables higher precision pattern transfer for sub-100 nm features by exploiting quantum mechanical properties of charged particles rather than relying on optical diffraction limits
2Manufacturing precision
If inverse lithography technology or optical proximity correction is used, then pattern transfer is attempted, but the prediction of wafer critical dimension sensitivity to resist exposure changes is inaccurate, leading to increased CD variation
Solution Approach 1:
The patent implements a feedback mechanism where the sensitivity of wafer critical dimensions to resist exposure changes is calculated based on the generated mask pattern. This calculated sensitivity information feeds back into the mask pattern generation process, allowing iterative optimization to achieve target CD uniformity and reduce variation by adjusting the mask design according to predicted performance
Solution Approach 2:
The patent performs preliminary calculation of wafer CD sensitivity to resist exposure changes during the mask pattern generation phase, before actual fabrication. This advance prediction allows the mask design to be optimized in advance to compensate for expected variations, preventing CD variation rather than correcting it after the fact
3Manufacturing precision
If charged particle beam lithography is used to achieve sub-100 nm pattern transfer, then manufacturing precision improves, but the complexity of calculating and modifying pattern exposure information increases
Solution Approach 1:
The patent implements a self-service mechanism where the system automatically calculates the sensitivity of wafer CD to resist exposure changes and uses this information to self-optimize the mask pattern design. This automated feedback loop reduces the need for manual intervention and complex external processing, allowing the system to handle the computational complexity internally while maintaining high precision pattern transfer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of pattern transfer for sub-100 nm features, reducing CD variation and line edge roughness, thereby improving the uniformity and precision of integrated circuit fabrication.
Implementation Method 1
A method for mask process correction or forming a pattern on a resist-coated reticle using charged particle beam lithography
Data Source
AI summary
A method for mask process correction or forming a pattern on a reticle using charged particle beam lithography is disclosed, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, where sensitivity of the wafer pattern is calculated with respect to changes in dimension of the reticle pattern, and where pattern exposure information is modified to increase edge slope of the reticle pattern where sensitivity of the wafer pattern is high. A method for fracturing or mask data preparation is also disclosed, where pattern exposure information is determined that can form a pattern on a reticle using charged particle beam lithography, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, and where sensitivity of the wafer pattern is calculated with respect to changes in dimension of the reticle pattern.