Miniature Charged Particle Beam Arrays for Resistless Substrate Processing
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Solution Overview
Problem
Conventional semiconductor lithography processes are expensive, time-consuming, and prone to defects due to the need for multiple steps and the use of optical masks, resist layers, and tool transfers, which introduce yield-reducing errors and increase manufacturing time.
Innovation Solution
The use of multiple miniature electrostatically-deflected charged particle beam columns configured with local gas and photon injectors and detectors allows for independent and simultaneous material deposition, removal, and modification within the same vacuum space without a resist layer, enabling precise process control and reducing the number of process steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography processes use optical masks, resist layers, and multiple tool transfers, then material deposition and removal can be performed, but the process becomes expensive, time-consuming, and prone to yield-reducing errors
Solution Approach 1:
The patent combines multiple lithography functions (material deposition, removal, and modification) into a single charged particle beam tool. Multiple beam columns are integrated to perform different processes simultaneously on the same substrate without requiring multiple tool transfers, thereby improving productivity while maintaining precision through direct beam-controlled processing.
Solution Approach 2:
The invention extracts and eliminates the resist layer from the conventional lithography process. By using charged particle beams directly for material deposition and removal, the process bypasses the need for photoresist coatings, mask fabrication, and chemical development steps, significantly reducing process complexity and yield-reducing errors while maintaining pattern fabrication precision.
2Ease of manufacture
If multiple process steps are performed sequentially with tool transfers, then complete substrate processing can be achieved, but manufacturing time increases and yield-reducing errors occur
Solution Approach 1:
The patent merges multiple process steps (deposition, removal, modification) into a single integrated tool with multiple beam columns. This allows all necessary substrate processing to be completed in one location without time-consuming tool transfers, achieving process completeness while dramatically reducing manufacturing time.
Solution Approach 2:
The invention enables continuous processing by performing multiple operations without breaking vacuum or transferring the substrate between tools. The charged particle beam system maintains continuous useful action on the substrate throughout the entire processing sequence, eliminating idle time and maintaining process efficiency.
3Manufacturing precision
If resist layers and optical masks are used for pattern transfer, then material deposition and removal can be controlled, but the process becomes complex and introduces yield-reducing errors
Solution Approach 1:
The invention extracts and removes the resist layer and optical mask components from the pattern transfer process. By using charged particle beams directly to deposit and remove materials according to digital design data, the system achieves precise pattern transfer without the complexity of mask fabrication, resist coating, and chemical processing steps.
Solution Approach 2:
The patent replaces the mechanical and chemical systems (optical masks, resist layers, chemical developers) with a direct charged particle beam system controlled by digital data. This substitution eliminates the complexity of physical mask handling and chemical resist processing while maintaining or improving pattern transfer accuracy through precise beam control.
4Ease of manufacture
If multiple tool transfers are performed for different lithography steps, then complete substrate processing can be achieved, but yield-reducing errors increase and manufacturing efficiency decreases
Solution Approach 1:
The patent merges multiple lithography functions into a single tool, eliminating the need for substrate transfers between different tools. This integration ensures process completeness while improving reliability by removing the sources of yield-reducing errors associated with tool transfers, such as contamination, misalignment, and handling damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces yield-reducing process steps, increases precision, and enhances manufacturing efficiency by allowing multiple processes to be performed without breaking vacuum, thereby reducing manufacturing time and improving yield.
Implementation Method 1
direct material addition...material can be deposited onto a substrate surface
Implementation Method 2
direct material subtraction...substrate surface material can be removed
Implementation Method 3
direct material modification...material on a substrate surface can be modified
Implementation Method 4
miniature electrostatically-deflected charged particle beam columns
Data Source
AI summary
Methods, tools and systems for patterning of substrates using charged particle beams without photomasks, without a resist layer, using multiple different processes (different chemistry processes and/or different ones of material deposition, removal and/or modification) in the same vacuum space, wherein said processes are performed independently (without cross-interference) and simultaneously. As a result, the number of process steps can be reduced and some lithography steps can be eliminated, reducing manufacturing cycle time and increasing yield by lowering the probability of defect introduction. Also, because such processes are resist-less, layer-to-layer registration and other column control processes can be performed by imaging previous-layer features local to (or in contact with) features to be written in a next layer as designated by the design layout database.


