Charging Circuit Thermal Management via Parallel Switch Segmentation
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Solution Overview
Problem
Conventional charging circuits face issues with high temperature susceptibility due to thermal hot spots and inefficient area usage, leading to potential thermal shutdown and layout challenges.
Innovation Solution
A charging circuit design that includes a high voltage NMOS switch, a current sensor with a sense resistor and amplifier, and a dual slope mechanism to control current flow, along with a one-shot controller to manage the switch's operation and minimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single high voltage switch is used to charge the external capacitor, then the charging speed is fast, but the power dissipation causes high temperature and thermal shutdown
Solution Approach 1:
The patent divides a single high-power charging switch into multiple parallel switches (e.g., 8 switches in the embodiment). Each switch handles a portion of the total charging current, reducing the power dissipation and temperature rise in each individual switch while maintaining the same total charging speed. The power dissipation is distributed across multiple devices, preventing thermal shutdown.
2Temperature
If multiple parallel switches are used to reduce current load, then the temperature is reduced, but the area usage becomes prohibitively large
Solution Approach 1:
The patent makes each switch serve dual functions: during normal operation, switches are activated sequentially to provide precise control with low current load; during charging mode, all switches are activated simultaneously to provide high current capacity. This multi-functionality allows the same switch array to handle both precise control requirements and high-power charging requirements without requiring separate dedicated charging switches, thus avoiding excessive area usage.
3Loss of energy
If multiple parallel switches are used for charging, then the power dissipation is reduced, but the delay matching requirements become very tight and layout is challenging
Solution Approach 1:
The patent incorporates delay matching circuitry (such as delay buffers or programmable delay elements) in the control paths of the parallel switches. These circuits pre-adjust the timing of control signals to compensate for variations in switch propagation delays. By performing this delay matching in advance (before the switches are activated), the patent simplifies the layout requirements while ensuring that all switches turn on simultaneously during charging mode, maintaining low power dissipation without excessive layout complexity.
4Productivity
If switches are activated simultaneously in charging mode, then the charging speed is fast, but the rise/fall times are not optimal if delays are not matched
Solution Approach 1:
The patent employs feedback mechanisms where the control circuit monitors the actual switching behavior and adjusts the control signals accordingly. During charging mode, the system activates all switches simultaneously but uses feedback from delay detection circuits to fine-tune the timing and ensure optimal rise/fall times. This feedback-based approach allows the system to achieve both fast charging speed and precise delay matching, optimizing the transient response characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal issues and optimizes area usage by dynamically controlling current flow, ensuring efficient charging while minimizing power consumption and preventing thermal shutdown.
Implementation Method 1
a current sensor that is coupled to the first switch so as to measure the current
Implementation Method 2
a high voltage switch Q1 (which is generally a high voltage PMOS transistor) that is controlled by a control signal CNTL so as to provide current to the external capacitor CEXT from a voltage source VSUP1
Implementation Method 3
the area of switch Q1 associated with an ON resistance of 0.5Ω can have a temperature increase of about 60° C. for 5 W of power PQ1
Data Source
AI summary
Conventional circuits often have undesirable characteristics to due “hot spots” or use a large amount of area. Here, however, a charging circuit is provides that uses an improved driver. Namely, an amplifier within a current sensor is used to control the rate that a switch can charge an external capacitor. This is accomplished through the adjustment of the gain of the amplifier during a charging mode.


