Check Node Data Compression Using MSBs for Lower Register Usage

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing check node data during integrity checks, leading to high register usage and reduced memory access performance.

Innovation Solution

The method involves compressing check node data by identifying the most significant bits (MSBs) of data items associated with each check node, determining a set of data bits based on these MSBs, and storing these data bits in memory blocks, thereby reducing the overall number of bits required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If check node data is stored in full precision in registers, then measurement precision is maintained, but device complexity and memory usage increase

Engineering Contradiction:
Improvecheck node data precisionVSAvoidregister usage
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the parameter representation by storing only the most significant bits (MSBs) of check node data instead of full precision values. This parameter change reduces the amount of data stored in registers while maintaining the essential information needed for LDPC decoding, thereby reducing device complexity without completely sacrificing measurement precision.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts only the most significant bits from the check node data, discarding the less significant bits. This extraction process reduces the data volume stored in registers, directly addressing the device complexity issue while preserving the critical information contained in the MSBs.

Inventive Principle:
Principle #2Taking out (Extraction)

2Device complexity

If check node data is compressed to reduce register usage, then device complexity is reduced, but measurement precision deteriorates

Engineering Contradiction:
Improveregister usageVSAvoidcheck node data precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies parameter changes by representing check node data using a reduced number of bits (MSBs) while maintaining the essential characteristics of the data. This allows compression of register usage while preserving sufficient precision for effective LDPC decoding operations.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If more check node data is stored in registers, then measurement precision is improved, but productivity decreases due to increased memory access time

Engineering Contradiction:
Improvecheck node data precisionVSAvoidmemory access performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent extracts and stores only the most significant bits of check node data in registers, reducing the total data volume. This extraction enables faster memory access and improved productivity while maintaining sufficient precision for decoding operations through the preserved MSBs.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By changing the data representation to use fewer bits (MSBs only), the patent reduces memory access time and improves productivity. The parameter change maintains essential information while enabling more efficient memory operations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12301253B2Check node data compression in memory systems
Publication Date: 2025.05.13 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US12301253B2 patent drawing
  • US12301253B2 patent drawing
  • US12301253B2 patent drawing

AI summary

This application is directed to compressing check node data for an electronic device. The electronic device identifies a check node corresponding to a subset of codeword symbols in a block of data and determines check node data that indicates a likelihood of the subset of codeword symbols being erroneous. A set of data bits are determined based on a value combination of data items of the check node data to uniquely identify the value combination among a set of selected value combinations according to a predefined relationship. The electronic device stores, in a memory block, the set of data bits representing the data items of the check node data of the check node. Each data item requires more data bits to represent all possible values of the respective data item than data bits of the set of data bits.