Checkerboard Multi-GPU Geometry Processing Scalability

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Solution Overview

Problem

Existing graphics architectures face inefficiencies in parallelizing both geometry processing and rasterization stages due to the lack of correlation between geometric objects and their image space footprint, leading to suboptimal scalability and performance bottlenecks.

Innovation Solution

Implementing a checkerboard rendering scheme where graphics cores perform vertex and geometry processing on separate batches of objects, with results stored in shared memory and distributed for rasterization across multiple cores in temporal order, allowing for near-linear scaling of geometry processing and efficient rasterization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If geometry processing is replicated across multiple graphics cores in conventional CBR schemes, then each core can independently perform rasterization, but geometry processing rate does not scale with the number of cores

Engineering Contradiction:
Improvegeometry processing rateVSAvoidarchitecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the graphics processing pipeline by separating geometry processing from rasterization. Multiple graphics cores are divided into geometry processing cores and rasterization cores, with each type specialized for its function. This segmentation allows geometry processing to scale across multiple cores without requiring each core to replicate the full pipeline, thereby improving geometry processing rate while managing architecture complexity through functional specialization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a unified graphics processing architecture where multiple identical graphics cores can function either as geometry processing cores or rasterization cores depending on the workload phase. This multi-functionality allows the same hardware design to be reused across different processing stages, improving scalability while avoiding the need for entirely separate specialized hardware for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If geometric objects are distributed across graphics cores for parallel geometry processing, then geometry processing throughput increases, but maintaining temporal order for rasterization becomes complex

Engineering Contradiction:
Improvegeometry processing throughputVSAvoidreordering mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by having geometry processing cores pre-process all geometric objects and store their results in a shared buffer before rasterization begins. This preliminary geometry processing phase allows subsequent rasterization to proceed in temporal order without complex reordering, as the preprocessing stage handles the parallel distribution and initial ordering of geometric data.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a shared buffer or memory structure as an intermediary between geometry processing cores and rasterization cores. This intermediary collects results from multiple parallel geometry processing operations and makes them available to rasterization cores in the correct temporal order, thereby decoupling the parallel geometry processing from the sequential rasterization requirements without adding significant complexity to either stage.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If each graphics core performs geometry processing for all submitted objects, then internal rasterization can operate independently, but there is no scaling of geometry processing with additional cores

Engineering Contradiction:
Improvegeometry processing scalabilityVSAvoidenergy efficiency
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent segments the graphics core population into specialized geometry processing cores and rasterization cores. This segmentation allows geometry processing to scale linearly with the number of geometry cores, while rasterization cores remain independent and efficient. Additional geometry cores can be added without proportionally increasing rasterization resource usage, improving both scalability and energy efficiency by matching computational resources to actual workload requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the operational parameters of the graphics system by allowing dynamic configuration of core functions and work distribution. Instead of each core processing all objects, the system parameters are changed to distribute specific object batches to specific cores based on workload characteristics, enabling linear scaling of geometry processing while optimizing energy consumption through load balancing and avoiding idle resources.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10217270B2Scalable geometry processing within a checkerboard multi-GPU configuration
Publication Date: 2019.02.26 INTEL CORP
  • US10217270B2 patent drawing
  • US10217270B2 patent drawing
  • US10217270B2 patent drawing

AI summary

Systems, apparatus and methods are described including distributing batches of geometric objects to a multi-core system, at each processor core, performing vertex processing and geometry setup processing on the corresponding batch of geometric objects, storing the vertex processing results shared memory accessible to all of the cores, and storing the geometry setup processing results in local storage. Each particular core may then perform rasterization using geometry setup results obtained from local storage within the particular core and from local storage of at least one of the other processor cores.