Checkpointing Memory Inspection Module for Fault Tolerance

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Solution Overview

Problem

Current checkpointing protocols are inadequate for effectively managing transient and intermittent faults in computing devices, which can corrupt data and require improved systems and methods for fault tolerance and recovery.

Innovation Solution

A computing system with a primary and secondary device, where the secondary device mirrors the state of the primary device at each checkpoint, allowing for seamless recovery and fault tolerance by resuming processing from the last checkpointed state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If checkpointing is implemented to enable fault tolerance and recovery, then reliability is improved, but device complexity increases due to the need for primary and secondary computing devices and state synchronization mechanisms

Engineering Contradiction:
Improvefault toleranceVSAvoidsystem structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a copy of the primary computing device's state by maintaining a secondary computing device that mirrors the primary device's memory and disk contents at checkpoint intervals. This copying approach enables fault tolerance by providing a recoverable state without requiring complex redundancy mechanisms, as the secondary device serves as a simplified backup copy that can be activated upon fault detection

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an inspection module as an intermediary component that monitors write requests to memory and identifies checkpoint opportunities. This intermediary enables automatic checkpointing by intercepting memory operations, tracking state changes, and triggering synchronization between primary and secondary devices without requiring complex coordination protocols between the main computing components

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of information

If state synchronization occurs at each checkpoint to ensure data integrity, then loss of information is reduced, but loss of time increases due to the overhead of copying state between devices

Engineering Contradiction:
Improvedata integrityVSAvoidcheckpoint overhead
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent implements periodic checkpointing where the secondary computing device synchronizes its state with the primary device at designated checkpoint intervals rather than continuously. The inspection module monitors write requests and triggers synchronization events periodically based on the frequency of memory operations, ensuring data integrity while avoiding excessive synchronization overhead by using a periodic rather than continuous approach

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent performs preliminary state copying by maintaining the secondary computing device in a synchronized state before faults occur. By proactively copying state at checkpoint intervals and keeping the secondary device ready with current state information, the system ensures data integrity is maintained in advance, allowing immediate recovery without time loss when faults are detected

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7496787B2Systems and methods for checkpointing
Publication Date: 2009.02.24 STRATUS TECH IRELAND LTD
  • US7496787B2 patent drawing
  • US7496787B2 patent drawing
  • US7496787B2 patent drawing

AI summary

The invention relates to checkpointing memory. In one aspect, a processor directs a write request to a location within a first memory. The write request includes at least a data payload and an address identifying the location. An inspection module identifies the write request before it reaches the first memory, copies at least the address identifying the location, and forwards the write request to a memory agent within the first memory.