Checksum Calculation Device Parallel Transmitter Control
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Solution Overview
Problem
Existing checksum calculation methods in communication technologies face inefficiencies due to the need for large buffers when handling packets larger than the maximum transmission unit (MTU) size and difficulties in performing checksum calculations on encrypted data, which can result in packet destruction.
Innovation Solution
A calculation device with multiple memories and transmitters, where a control unit determines which transmitter performs checksum calculation based on the communication method, allowing for efficient checksum calculation through parallel processing and pipeline operations, even for encrypted data and packets larger than MTU size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If checksum calculation is performed on packets larger than MTU size, then complete packet processing is achieved, but large buffers are required which increases device cost
Solution Approach 1:
The patent divides the packet processing into two stages: first segmenting the packet data into multiple blocks that can be processed in parallel, then calculating checksums for each block independently. This segmentation allows the transmitter to process large packets without requiring a single large buffer, as data is handled in manageable chunks across multiple memory locations.
Solution Approach 2:
The patent introduces a new dimension to buffer management by using multiple memory blocks arranged in a specific pattern. Instead of requiring one large buffer, the system uses multiple smaller buffers organized in a matrix-like structure, allowing checksum calculation to proceed across different memory dimensions without increasing the peak memory requirement.
2Reliability
If checksum calculation is performed on encrypted packets, then error detection is achieved, but packets may be destroyed due to incorrect calculation on encrypted data
Solution Approach 1:
The patent implements dynamic control of the checksum calculation process based on packet characteristics. The system determines whether to perform checksum calculation on encrypted or unencrypted packets, and adjusts the processing mode accordingly. This dynamic adaptation prevents incorrect checksum calculation on encrypted data while maintaining error detection capability on appropriate packets.
Solution Approach 2:
The patent changes the processing parameters based on the encryption state of the packet. When encrypted packets are detected, the system modifies the checksum calculation parameters or skips the calculation entirely, avoiding the harmful effect of incorrect checksums on encrypted data. This parameter adjustment ensures reliable operation across different packet types.
3Productivity
If multiple transmitters are used for parallel processing, then processing efficiency is improved, but device complexity increases
Solution Approach 1:
The patent designs the transmitter system with multi-functionality, where each transmitter can perform multiple operations including data transmission, checksum calculation, and data processing. This universal design allows the system to achieve parallel processing efficiency without proportionally increasing complexity, as the same hardware components serve multiple purposes.
Solution Approach 2:
The patent merges the checksum calculation function with the existing transmitter hardware, combining data transmission and checksum processing into integrated units. This merging approach enables parallel processing while avoiding the need for completely separate calculation devices, thus improving productivity without excessive complexity increase.
Data Source
AI summary
A calculation device that performs checksum calculation on data to be communicated includes a plurality of memories, an interface configured to output data to which a checksum is added, a first transmitter configured to transmit the data between the plurality of memories and have a function of performing the checksum calculation on the data, a second transmitter configured to transmit the data between one of the plurality of memories and the interface and have a function of performing the checksum calculation on the data, and a control unit configured to control operation of the first transmitter and the second transmitter. The control unit causes the first transmitter or the second transmitter to perform the checksum calculation based on a communication method employed for the data.