ECC Check Word Inversion for Erase-Free Unidirectional Memory
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Solution Overview
Problem
In unidirectional memory technologies like flash and phase-change memories, updating data without losing coherence of Error Correction Code (ECC) check bits requires an erase operation, which is time-consuming and reduces system performance.
Innovation Solution
A method that allows generating a coherent check word without performing an erase operation by using internal coding and bit inversion techniques, enabling data transitions from one state to another without additional check bits, thus maintaining ECC coherence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an erase operation is performed to update data in unidirectional memory, then data reliability is improved, but system performance and speed deteriorate
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing multiple possible ECC check words corresponding to different data states before actual data updates occur. When data needs to be updated, the system can directly switch to the pre-prepared check word without performing time-consuming erase operations, thus maintaining both data reliability and system performance
Solution Approach 2:
The patent changes the parameter approach by transitioning from a single ECC check word to multiple possible check words that correspond to different data states. This allows the system to adaptively select the appropriate check word based on the current data state, eliminating the need for erase operations while maintaining ECC coherence and improving update speed
2Reliability
If an erase operation is performed to maintain ECC coherence, then error correction capability is improved, but update time increases
Solution Approach 1:
The system performs preliminary calculation and storage of multiple ECC check words corresponding to different data states before actual updates. This pre-preparation eliminates the need for time-consuming erase operations when updating data, as the appropriate check word is already available, thus reducing update time while maintaining ECC coherence
Solution Approach 2:
The patent enables continuous data updates without interrupting ECC coherence by maintaining multiple valid check words simultaneously. This allows the system to continuously update data while the corresponding check words remain valid, eliminating the stop-start nature of erase operations and reducing total update time
3Reliability
If additional check bits are used to maintain ECC coherence during data transitions, then error detection capability is improved, but memory complexity increases
Solution Approach 1:
The patent makes the existing ECC check bits multi-functional by creating multiple check words that serve different data states. Instead of adding new check bits, the system reuses the existing check bit structure with multiple pre-calculated values, thereby maintaining error detection capability without increasing memory complexity
Solution Approach 2:
The patent changes the parameter from the number of check bits to the number of possible check word values. This allows the system to maintain the same memory structure and complexity while improving error detection capability through the use of multiple pre-calculated check words corresponding to different data states
Data Source
AI summary
A memory array and a method of writing to a unidirectional non-volatile storage cell are disclosed whereby a user data word is transformed to an internal data word and written to one or more unidirectional data storage cells according to a cell coding scheme. A check word may be generated that corresponds to the internal data word. In some embodiments, the check word may be generated by inverting one or more bits of an intermediate check word. Other embodiments may be described and claimed.


