Chessboard Well Shielding for Integrated Inductor Substrate Loss
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Solution Overview
Problem
Existing integrated inductor structures face challenges with substrate loss and parasitic capacitance due to eddy currents and displacement currents, which reduce the quality factor and self-resonance frequency, especially at higher frequencies.
Innovation Solution
A chessboard-like or mesh-like well shielding layer with N type and P type diffusion regions, a P+ pickup ring, and a guard ring are used to minimize eddy currents and parasitic capacitance, comprising a substrate with a metal coil layer and dielectric layers, where the well shielding layer is arranged to interrupt eddy currents and the pickup ring absorbs noise signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon or metal patterned ground shields are used to reduce eddy current, then the quality factor is improved, but parasitic capacitance increases and self-resonance frequency decreases
Solution Approach 1:
The ground shield is segmented into a chessboard-like pattern of alternating N-type and P-type diffusion regions instead of using continuous polysilicon or metal shields. This segmentation reduces parasitic capacitance while maintaining eddy current suppression, thereby improving self-resonance frequency while preserving quality factor enhancement.
2Loss of energy
If continuous ground shields are used to minimize substrate loss, then eddy current is reduced, but parasitic capacitance increases
Solution Approach 1:
The continuous ground shield is divided into discrete N-type and P-type diffusion regions arranged in a chessboard pattern. This segmentation interrupts the formation of large parasitic capacitance while maintaining the shielding effect against substrate loss through distributed eddy current suppression.
Solution Approach 2:
The ground shield uses a composite structure combining N-type and P-type diffusion regions in a chessboard pattern within the semiconductor substrate. This composite arrangement creates multiple small depletion regions that collectively suppress eddy currents while minimizing overall parasitic capacitance compared to continuous metal or polysilicon shields.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces substrate losses, increases the quality factor, and enhances the self-resonance frequency of the integrated inductor, improving its performance across a broader frequency range.
Implementation Method 1
A well shielding layer for reducing eddy current is disposed in the substrate directly under the metal coil layer
Implementation Method 2
capable of minimizing substrate loss induced by eddy current or displacement current
Implementation Method 3
A P+ pickup ring is provided in the substrate to encompass the well shielding layer
Data Source
AI summary
This invention provides an integrated inductor structure including a substrate, a metal coil layer on the substrate and a dielectric layer between the substrate and the metal coil layer. A well shielding structure for reducing eddy current is disposed in the substrate under the metal coil layer. The well shielding structure is chequered with a plurality of N wells and a plurality of P wells. The N wells and P wells are arranged in a chessboard-like manner. A P+ pickup ring is provided in the substrate to encompass the well shielding structure. A guard ring is formed directly on the P+ pickup ring.