Multi-Code Chien Search Circuit for Flexible BCH Decoding
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Solution Overview
Problem
Conventional Chien's search circuits are limited to fixed code rates and lengths, and specific values of m in GF(2m), making them unsuitable for applications requiring different code rates, lengths, and m values.
Innovation Solution
A multi-code Chien's search circuit is designed with a combined matrix unit, multiple multiplexers, and registers to provide multiple Chien's search matrices, allowing for parallel computations and flexible operation across various code rates, lengths, and m values, reducing hardware complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional Chien's search circuits are used, then the circuit can decode BCH codes with fixed code rate and length, but the circuit cannot adapt to different code rates, lengths, and m values
Solution Approach 1:
The patent designs a Chien's search circuit that can universally handle BCH codes with different code rates, lengths, and m values by using configurable parameters (m, t, p) and a unified matrix computation architecture. The circuit performs multi-functionality by adapting to various code configurations without requiring separate dedicated circuits for each code type.
Solution Approach 2:
The patent introduces dynamic configurability through parameters m, t, and p that can be adjusted based on the specific BCH code being decoded. The matrix dimensions and computation depth are dynamically adapted to match the code requirements, allowing the circuit to transition between different operating modes seamlessly.
2Productivity
If parallel computation architecture is applied to improve throughput, then p error locations can be found in one clock, but the hardware complexity increases with pt finite field multipliers and other components
Solution Approach 1:
The patent merges multiple computation operations into a unified matrix multiplication framework. By combining the computation of multiple error location candidates into a single matrix operation Y(u) = Ω(u) × A, the circuit reduces redundant computations and shares common sub-expressions across parallel operations, thereby lowering hardware complexity while maintaining high throughput.
Solution Approach 2:
The patent changes the computational parameters by representing the Chien's search process in terms of matrix dimensions (m×mt) and iteration depth (n/p). This parameter transformation allows the circuit to achieve parallel processing efficiency while optimizing the balance between throughput and hardware resources through mathematical reformulation.
3Adaptability or versatility
If the circuit is designed for fixed code rate and length, then the circuit structure is simpler, but the circuit cannot fulfill requirements for different code rates, lengths, and m values
Solution Approach 1:
The patent creates a universal Chien's search circuit design that can be manufactured as a single configurable unit rather than multiple fixed circuits. The unified matrix computation architecture with adjustable parameters (m, t, p) allows one circuit design to serve multiple code configurations, simplifying the manufacturing and deployment process.
Solution Approach 2:
The patent segments the computation into modular matrix operations that can be independently configured. The matrix multiplication framework allows the circuit to be divided into reusable computational blocks (matrix multiplication unit, feedback shift register, XOR operations) that can be assembled and configured for different code parameters, making the design easier to manufacture and verify.
Data Source
AI summary
The present invention discloses a multi-code Chien's search circuit for BCH codes with various values of m in GF(2m). The circuit includes: a combined matrix unit, a number of first multiplexers, a number of registers and a number of second multiplexers. By designing the Chien's search circuit having several Chien's search matrices, with peripheral components, it is able to achieve applications for different code rates, different code lengths and even different m in GF(2m).